Re: Implementation of fwnode_operations :: device_get_match_data() for software nodes?

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

On Wed, Mar 01, 2023 at 04:36:25PM +0200, Vladimir Oltean wrote:
> On Wed, Mar 01, 2023 at 04:33:16PM +0200, Andy Shevchenko wrote:
> > On Tue, Feb 28, 2023 at 01:44:11AM +0200, Vladimir Oltean wrote:
> > > On Tue, Feb 28, 2023 at 12:26:19AM +0200, Andy Shevchenko wrote:
> > > > I believe that there are few reasons for that:
> > > > 1) (besides that what Heikki mentioned);
> > > > 2) the software nodes only for quirks, seems you are trying to implement
> > > > something that should have to be implemented as proper DT / ACPI device node.
> > > > 
> > > > Can you elaborate why do you need that (as you see no other board file requires
> > > > this)?
> > > 
> > > Trying to keep the answer short while still answering the question.
> > 
> > Thank you, this is helpful to understand what you want.
> > 
> > Random idea #N+1 based on what you told is: how about DT / ACPI overlays?
> > Random idea #N+2 is: have you considered FPGA approach?
> > 
> > So, as far as I got it right the device _can_ be considered as hotpluggable
> > blackbox with a lot of hardware onboard. This is very much reminds me FPGA
> > sitting behind PCIe hotplug capable interface.
> > 
> > What do we have now there? Can we spread the same approach for your case?
> > 
> > Because to me board files here looks like a hack.
> > 
> > P.S.
> > Yeah, I know that SPI is not hotpluggable bus per se. It may be that
> > we actually need to reboot machine after plugging in/out the device.
> 
> Can you please give me some clearer references for #N+1 and #N+2?

> I haven't considered either of those options and I'm not sure what that
> would entail.

With overlays you can create the proper DT description stanza and end user's
job is to just put it somewhere and upload via precoded script or so [1].


For the second one I'm not really the expert. But either FPGA framework (if
they have anything working for this), or you also may look at Thunderbolt /
USB4 which uses similar approach while being PCIe devices. Okay, the latter
(USB4) is the PCIe topology, while FPGA is whatever behind the PCI switch.
Meaning that FPGA case from HW p.o.v. is closer to your case.

[1]:https://docs.kernel.org/devicetree/overlay-notes.html

-- 
With Best Regards,
Andy Shevchenko