From: Mark Brown <broonie@kernel.org>
To: chengwei <foxfly.lai.tw@gmail.com>
Cc: lee@kernel.org, rafael@kernel.org,
mika.westerberg@linux.intel.com,
andriy.shevchenko@linux.intel.com, linus.walleij@linaro.org,
brgl@bgdev.pl, linux-kernel@vger.kernel.org,
gregkh@linuxfoundation.org, lenb@kernel.org,
linux-acpi@vger.kernel.org, linux-gpio@vger.kernel.org,
GaryWang@aaeon.com.tw, musa.lin@yunjingtech.com,
jack.chang@yunjingtech.com, chengwei <larry.lai@yunjingtech.com>,
Nicola Lunghi <nicola.lunghi@emutex.com>
Subject: Re: [PATCH 2/5] regmap: Expose regmap_writeable function to check if a register is writable
Date: Wed, 19 Oct 2022 12:57:37 +0100 [thread overview]
Message-ID: <Y0/mMeVSTEKfOgBN@sirena.org.uk> (raw)
In-Reply-To: <20221019022450.16851-3-larry.lai@yunjingtech.com>
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On Wed, Oct 19, 2022 at 10:24:47AM +0800, chengwei wrote:
> Expose the regmap_writeable function for pinctrl-upboard reference.
Why? A driver should understand the register map of the device it is
controlling.
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next prev parent reply other threads:[~2022-10-19 12:52 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 2:24 [PATCH 0/5] Add support control UP board CPLD/FPGA pin control chengwei
2022-10-19 2:24 ` [PATCH 1/5] mfd: Add support for UP board CPLD/FPGA chengwei
2022-10-31 14:58 ` Lee Jones
[not found] ` <SG2PR06MB37422173908A6584B3D6D349F93F9@SG2PR06MB3742.apcprd06.prod.outlook.com>
2022-11-08 15:53 ` 回覆: " gregkh
[not found] ` <SG2PR06MB3742D3714B6A255914DC73E4F93F9@SG2PR06MB3742.apcprd06.prod.outlook.com>
2022-11-08 17:24 ` gregkh
2022-11-14 10:09 ` Lee Jones
2022-10-19 2:24 ` [PATCH 2/5] regmap: Expose regmap_writeable function to check if a register is writable chengwei
2022-10-19 11:57 ` Mark Brown [this message]
2022-10-19 2:24 ` [PATCH 3/5] ACPI: acpi_node_add_pin_mapping added to header file chengwei
2022-10-19 13:32 ` Andy Shevchenko
2022-10-19 2:24 ` [PATCH 4/5] GPIO ACPI: Add support to map GPIO resources to ranges chengwei
2022-10-19 13:36 ` Andy Shevchenko
2022-10-19 2:24 ` [PATCH 5/5] pinctrl: Add support pin control for UP board CPLD/FPGA chengwei
2022-10-20 16:58 ` Andy Shevchenko
2022-10-21 9:09 ` Linus Walleij
2022-10-21 10:55 ` Andy Shevchenko
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