From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B957C433E6 for ; Tue, 2 Mar 2021 11:22:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CE8C264F0B for ; Tue, 2 Mar 2021 11:22:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1446547AbhCBLSO (ORCPT ); Tue, 2 Mar 2021 06:18:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349609AbhCBKmx (ORCPT ); Tue, 2 Mar 2021 05:42:53 -0500 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89AFBC061756; Tue, 2 Mar 2021 02:32:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=F6qthdef1oL7Dk4r+O4vHCgwbdrKqGXK0mSoEWD6Tpc=; b=W+9iyS0S3xZXDQMTKv9qOoTbzq DETq9J4HXqzXK/klgSYLlMOK2j/kdfZWBrB0fBGtlt1q0w/obZsTjvoAYpZE8HF31nrd7XN5Gn76t r9xbdsXrADg4IHbklIeF6IcDi21Lj8Y3Fw+mdQ4Vi6fHd3hpybYHZ6QrOXUBRlC+V9226IaJYmO1s ndNDO1/3QW3UMM9Gv1WjOzViE6jNTqtkbzO0QByeIGWVrC22/q7n68glVpLDE7M04N/2KoDEAuf1C DApoVmodqrRISvRz07oIbtIwkYDWnj1ZyMz4QhWp1A6IHJ0Vlr+sTJGdc837OAp0zKLJMHYtMK5kA z0kSNvmQ==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94 #2 (Red Hat Linux)) id 1lH2If-00Gwg8-TI; Tue, 02 Mar 2021 10:30:48 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id 26904306BCA; Tue, 2 Mar 2021 11:30:43 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 173262027C1AA; Tue, 2 Mar 2021 11:30:43 +0100 (CET) Date: Tue, 2 Mar 2021 11:30:43 +0100 From: Peter Zijlstra To: Barry Song Cc: tim.c.chen@linux.intel.com, catalin.marinas@arm.com, will@kernel.org, rjw@rjwysocki.net, vincent.guittot@linaro.org, bp@alien8.de, tglx@linutronix.de, mingo@redhat.com, lenb@kernel.org, dietmar.eggemann@arm.com, rostedt@goodmis.org, bsegall@google.com, mgorman@suse.de, msys.mizuma@gmail.com, valentin.schneider@arm.com, gregkh@linuxfoundation.org, jonathan.cameron@huawei.com, juri.lelli@redhat.com, mark.rutland@arm.com, sudeep.holla@arm.com, aubrey.li@linux.intel.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, x86@kernel.org, xuwei5@huawei.com, prime.zeng@hisilicon.com, guodong.xu@linaro.org, yangyicong@huawei.com, liguozhu@hisilicon.com, linuxarm@openeuler.org, hpa@zytor.com Subject: Re: [RFC PATCH v4 3/3] scheduler: Add cluster scheduler level for x86 Message-ID: References: <20210301225940.16728-1-song.bao.hua@hisilicon.com> <20210301225940.16728-4-song.bao.hua@hisilicon.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210301225940.16728-4-song.bao.hua@hisilicon.com> Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On Tue, Mar 02, 2021 at 11:59:40AM +1300, Barry Song wrote: > From: Tim Chen > > There are x86 CPU architectures (e.g. Jacobsville) where L2 cahce > is shared among a cluster of cores instead of being exclusive > to one single core. Isn't that most atoms one way or another? Tremont seems to have it per 4 cores, but earlier it was per 2 cores.