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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Anand Ashok Dumbre <ANANDASH@xilinx.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"jic23@kernel.org" <jic23@kernel.org>,
	"lars@metafoo.de" <lars@metafoo.de>,
	"linux-iio@vger.kernel.org" <linux-iio@vger.kernel.org>,
	git <git@xilinx.com>, Michal Simek <michals@xilinx.com>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"rafael@kernel.org" <rafael@kernel.org>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"heikki.krogerus@linux.intel.com"
	<heikki.krogerus@linux.intel.com>,
	Manish Narani <MNARANI@xilinx.com>
Subject: Re: [PATCH v9 3/5] iio: adc: Add Xilinx AMS driver
Date: Wed, 17 Nov 2021 14:48:54 +0200	[thread overview]
Message-ID: <YZT6NgAbkHVNAst0@smile.fi.intel.com> (raw)
In-Reply-To: <BY5PR02MB6916E4CF9E34190CF7D24AE4A9999@BY5PR02MB6916.namprd02.prod.outlook.com>

On Tue, Nov 16, 2021 at 08:29:21PM +0000, Anand Ashok Dumbre wrote:
> > From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > Sent: Tuesday 16 November 2021 5:39 PM
> > On Tue, Nov 16, 2021 at 03:08:40PM +0000, Anand Ashok Dumbre wrote:

...

> > > +#define AMS_ALARM_THR_MIN		0x0000
> > > +#define AMS_ALARM_THR_MAX		0xFFFF
> > 
> > If this is limited by hardware register, I would rather use (BIT(16) - 1)
> > notation. It will give immediately amount of bits used for the value.

> So ~(BIT(16) - 1) for AMS_ALARM_THR_MIN

This will give wrong value, so preserving 0 as plain decimal is fine.

> (BIT(16) - 1) for AMS_ALARM_THR_MAX

...

> > > +	u32 reg;
> > > +	int ret;
> > 
> > 	u32 expect = AMS_PS_CSTS_PS_READY;
> > 
> > (Use similar approach for other readX_poll_timeout() cases)
> > 
> > > +		ret = readl_poll_timeout(ams->base + AMS_PS_CSTS, reg,
> > > +					 (reg & AMS_PS_CSTS_PS_READY) ==
> > > +					 AMS_PS_CSTS_PS_READY, 0,
> > > +					 AMS_INIT_TIMEOUT_US);
> > 
> > 		ret = readl_poll_timeout(ams->base + AMS_PS_CSTS, reg,
> > 					 (reg & expect) == expect,
> > 					 0, AMS_INIT_TIMEOUT_US);

> > 0?!

Any comments on this?

Besides there are other cases you haven't answered on, so I assume you agreed
to change as suggested.

> > > +		if (ret)
> > > +			return ret;
> > 
> > ...
> > 
> > > +		ret = readl(ams->base + AMS_PL_CSTS);
> > > +		if (ret == 0)
> > > +			return ret;
> > 
> > Assigning u32 to int seems wrong.
> 
> It's a single bit register.
> Even if I use u32 here, the return type is int.

The problem here is that you checked not for error code, readl() doesn't return
an error. So semantic issue.

> So, is it ok if I read using u32 and return it by typecasting to int?

No. You need to have something like this:

	value = readl(...);
	if (value == 0)
		return 0;

this will keep proper meaning of each number and variable, while compiler may
optimize it.

...

> > > +					regval = readl(ams->pl_base +
> > > +						       AMS_REG_CONFIG4);
> > 
> > One line?
> > 
> > > +					regval = readl(ams->pl_base +
> > > +						       AMS_REG_CONFIG4);
> > 
> > Ditto and so on...
> > 
> It goes over 80 chars per line.

Is it a problem?

...

> > > +	schedule_delayed_work(&ams->ams_unmask_work,
> > > +			      msecs_to_jiffies(AMS_UNMASK_TIMEOUT_MS));
> > 
> > Can be one line.
> 
> Over 80 characters.

Is it a problem?

> Oh! I just saw that upto 100 chars is ok.

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2021-11-17 12:49 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-16 15:08 [PATCH v9 0/5] Add Xilinx AMS Driver Anand Ashok Dumbre
2021-11-16 15:08 ` [PATCH v9 1/5] device property: Add fwnode_iomap() Anand Ashok Dumbre
2021-11-16 17:07   ` Andy Shevchenko
2021-11-16 15:08 ` [PATCH v9 2/5] arm64: zynqmp: DT: Add Xilinx AMS node Anand Ashok Dumbre
2021-11-16 17:39   ` Andy Shevchenko
2021-11-16 18:55     ` Anand Ashok Dumbre
2021-11-16 15:08 ` [PATCH v9 3/5] iio: adc: Add Xilinx AMS driver Anand Ashok Dumbre
2021-11-16 17:38   ` Andy Shevchenko
2021-11-16 20:29     ` Anand Ashok Dumbre
2021-11-17 12:48       ` Andy Shevchenko [this message]
2021-11-16 15:08 ` [PATCH v9 4/5] dt-bindings: iio: adc: Add Xilinx AMS binding documentation Anand Ashok Dumbre
2021-11-16 15:08 ` [PATCH v9 5/5] MAINTAINERS: Add maintainer for xilinx-ams Anand Ashok Dumbre
2021-11-16 17:41   ` Andy Shevchenko
2021-11-17 14:34     ` Anand Ashok Dumbre
2021-11-17 15:17       ` Andy Shevchenko
2021-11-17 16:05         ` Joe Perches
2021-11-17 17:08           ` Andy Shevchenko
2021-11-17 18:46             ` Joe Perches
2021-11-17 19:28               ` Andy Shevchenko
2021-11-17 23:06                 ` Joe Perches
2021-11-17 21:57             ` Anand Ashok Dumbre

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