From: Nicolin Chen <nicolinc@nvidia.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: <lpieralisi@kernel.org>, <guohanjun@huawei.com>,
<sudeep.holla@arm.com>, <linux-acpi@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <will@kernel.org>,
<catalin.marinas@arm.com>
Subject: Re: [PATCH] ACPI/IORT: Update SMMUv3 DeviceID support
Date: Thu, 29 Sep 2022 09:23:37 -0700 [thread overview]
Message-ID: <YzXGiULo1RXUR0l4@Asurada-Nvidia> (raw)
In-Reply-To: <0862c961-d047-6c5d-e577-62a58b1d1bc5@arm.com>
On Thu, Sep 29, 2022 at 11:22:13AM +0100, Robin Murphy wrote:
> External email: Use caution opening links or attachments
>
>
> On 2022-09-29 00:55, Nicolin Chen wrote:
> > On Wed, Sep 28, 2022 at 08:21:26PM +0100, Robin Murphy wrote:
> > > External email: Use caution opening links or attachments
> > >
> > >
> > > IORT E.e now allows SMMUv3 nodes to describe the DeviceID for MSIs
> > > independently of wired GSIVs, where the previous oddly-restrictive
> > > definition meant that an SMMU without PRI support had to provide a
> > > DeviceID even if it didn't support MSIs either. Support this, with
> > > the usual temporary flag definition while the real one is making
> > > its way through ACPICA.
> > >
> > > Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> >
> > All the indentations in this patch are using white spaces vs. tabs,
>
> That must be something at your end - they're definitely tabs here, and
> the copy in the lore archives looks right too.
Oh...it is something wrong on my side. The patch should be fine.
Sorry for the confusion.
next prev parent reply other threads:[~2022-09-29 16:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-28 19:21 [PATCH] ACPI/IORT: Update SMMUv3 DeviceID support Robin Murphy
2022-09-28 23:55 ` Nicolin Chen
2022-09-29 10:22 ` Robin Murphy
2022-09-29 16:23 ` Nicolin Chen [this message]
2022-11-07 19:08 ` Will Deacon
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