From: Tony Luck <tony.luck@intel.com>
To: Ben Cheatham <Benjamin.Cheatham@amd.com>
Cc: dan.j.williams@intel.com, jonathan.cameron@huawei.com,
rafael@kernel.org, james.morse@arm.com, bp@alien8.de,
dave@stogolabs.net, dave.jiang@intel.com,
alison.schofield@intel.com, vishal.l.verma@intel.com,
ira.weiny@intel.com, linux-cxl@vger.kernel.org,
linux-acpi@vger.kernel.org
Subject: Re: [PATCH v12 0/3] cxl, EINJ: Update EINJ for CXL error types
Date: Wed, 14 Feb 2024 17:11:29 -0800 [thread overview]
Message-ID: <Zc1kwWupeN9WagFj@agluck-desk3> (raw)
In-Reply-To: <20240214200709.777166-1-Benjamin.Cheatham@amd.com>
On Wed, Feb 14, 2024 at 02:07:06PM -0600, Ben Cheatham wrote:
> v12 Changes:
> - Rebase onto v6.8-rc4
> - Squash Kconfig patch into patch 2/3 (Jonathan)
> - Change CONFIG_CXL_EINJ from "depends on ACPI_APEI_EINJ >= CXL_BUS"
> to "depends on ACPI_APEI_EINJ = CXL_BUS"
> - Drop "ACPI, APEI" part of commit message title and use just EINJ
> instead (Dan)
> - Add protocol error types to "einj_types" documentation (Jonathan)
> - Change 0xffff... constants to use GENMASK()
> - Drop param* variables and use constants instead in cxl error
> inject functions (Jonathan)
> - Add is_cxl_error_type() helper function in einj.c (Jonathan)
> - Remove a stray function declaration in einj-cxl.h (Jonathan)
> - Comment #else/#endifs with corresponding #if/#ifdef in
> einj-cxl.h (Jonathan)
>
> v11 Changes:
> - Drop patch 2/6 (Add CXL protocol error defines) and put the
> defines in patch 4/6 instead (Dan)
> - Add Dan's reviewed-by
>
> The new CXL error types will use the Memory Address field in the
> SET_ERROR_TYPE_WITH_ADDRESS structure in order to target a CXL 1.1
> compliant memory-mapped downstream port. The value of the memory address
> will be in the port's MMIO range, and it will not represent physical
> (normal or persistent) memory.
>
> Add the functionality for injecting CXL 1.1 errors to the EINJ module,
> but not through the EINJ legacy interface under /sys/kernel/debug/apei/einj.
> Instead, make the error types available under /sys/kernel/debug/cxl.
> This allows for validating the MMIO address for a CXL 1.1 error type
> while also not making the user responsible for finding it.
I tried this series on an Intel Icelake (which as far as I know
doesn't support CXL).
Couple of oddities:
1) I built as a module (CONFIG_ACPI_APEI_EINJ=m) like I normally do.
But this was autoloaded and EINJ initialized during boot:
[ 33.909111] EINJ: Error INJection is initialized.
I'm wondering if that might be a problem for anyone that likes to
leave the einj module not loaded until they have some need to
inject errors.
2) Even though my system doesn't have any CXL support, I found this:
# cat /sys/kernel/debug/cxl/einj_types
0x00001000 CXL.cache Protocol Correctable
What does this mean?
Using ras-tools I injected some DDR memory errors. So legacy
functionality still works OK.
-Tony
next prev parent reply other threads:[~2024-02-15 1:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-14 20:07 [PATCH v12 0/3] cxl, EINJ: Update EINJ for CXL error types Ben Cheatham
2024-02-14 20:07 ` [PATCH v12 1/3] EINJ: Migrate to a platform driver Ben Cheatham
2024-02-16 2:03 ` kernel test robot
2024-02-16 13:43 ` kernel test robot
2024-02-14 20:07 ` [PATCH v12 2/3] cxl/core, EINJ: Add EINJ CXL debugfs files and EINJ helper functions Ben Cheatham
2024-02-15 2:25 ` Dan Williams
2024-02-15 15:01 ` Ben Cheatham
2024-02-16 0:15 ` Dan Williams
2024-02-15 9:33 ` Jonathan Cameron
2024-02-15 15:01 ` Ben Cheatham
2024-02-14 20:07 ` [PATCH v12 3/3] EINJ, Documentation: Update EINJ kernel doc Ben Cheatham
2024-02-20 19:02 ` Davidlohr Bueso
2024-02-20 19:59 ` Ben Cheatham
2024-02-15 1:11 ` Tony Luck [this message]
2024-02-15 2:53 ` [PATCH v12 0/3] cxl, EINJ: Update EINJ for CXL error types Dan Williams
2024-02-15 15:01 ` Ben Cheatham
2024-02-15 17:23 ` Luck, Tony
2024-02-15 18:15 ` Luck, Tony
2024-02-16 0:11 ` Dan Williams
2024-02-16 0:09 ` Dan Williams
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