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This bit is not always set, causing CPPC v2 to be considered absent. This results in severe single-core performance issues with the EEVDF scheduler on heterogenous-core Intel processors. To work around this, provide a new kernel parameter, "ignore_osc_cppc_bit", which may be used to ignore the _OSC CPPC v2 bit and act as if the bit was enabled. This allows CPPC to be properly detected even if not "enabled" by _OSC, allowing users with problematic hardware to obtain decent single-core performance. Tested-by: Michael Mikowski Signed-off-by: Aaron Rainbolt --- V2 -> V3: Move bit ignore to before switch. V1 -> V2: Rewrite to work in cpc_supported_by_cpu. diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index b600df82669d..af2d8973ba3a 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2063,6 +2063,12 @@ could change it dynamically, usually by /sys/module/printk/parameters/ignore_loglevel. + ignore_osc_cppc_bit + Assume CPPC is present and ignore the CPPC v2 bit from + the ACPI _OSC method. This is useful for working + around buggy firmware where CPPC is supported, but + _OSC incorrectly reports it as being absent. + ignore_rlimit_data Ignore RLIMIT_DATA setting for data mappings, print warning at first misuse. Can be changed via diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index ff8f25faca3d..0ca1eac826af 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -11,8 +11,20 @@ /* Refer to drivers/acpi/cppc_acpi.c for the description of functions */ +static bool ignore_osc_cppc_bit; +static int __init parse_ignore_osc_cppc_bit(char *arg) +{ + ignore_osc_cppc_bit = true; + return 0; +} +early_param("ignore_osc_cppc_bit", parse_ignore_osc_cppc_bit); + bool cpc_supported_by_cpu(void) { + if (ignore_osc_cppc_bit) { + return true; + } + switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: case X86_VENDOR_HYGON: