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Shenoy" To: Mario Limonciello Cc: Borislav Petkov , Perry Yuan , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "Rafael J . Wysocki" , "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "open list:ACPI" , "open list:CPU FREQUENCY SCALING FRAMEWORK" , Mario Limonciello Subject: Re: [PATCH 5/8] x86/amd: Detect preferred cores in amd_get_boost_ratio_numerator() Message-ID: References: <20240826211358.2694603-1-superm1@kernel.org> <20240826211358.2694603-6-superm1@kernel.org> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240826211358.2694603-6-superm1@kernel.org> X-ClientProxiedBy: PN3PR01CA0058.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:99::17) To DS7PR12MB8252.namprd12.prod.outlook.com (2603:10b6:8:ee::7) Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS7PR12MB8252:EE_|DM3PR12MB9434:EE_ X-MS-Office365-Filtering-Correlation-Id: 3676dd4f-e1ba-4924-24e4-08dcc6af181f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?FYjPFPSjiFZHX7rW3My/p5+5g/GQZARtB8Emu5GuJTI521ndpj3B+KuzCtua?= =?us-ascii?Q?8VcOR7lFyFMFy4hmFBxKVzz+fprKhQe9ZxkSraG0cwqoVGSBmjoCuLovc6xp?= =?us-ascii?Q?rMPsPBx9+IbH/geR0cIBbHADBnYIe5BKncKB+D8sT5dDDG/iBlMkXVMqpU1q?= =?us-ascii?Q?CHyxZvEYXm7zGX70FH4rTaWQu7ZEKUxlBpxG5bAvXcoRHqFyUnWnXpfpauwr?= =?us-ascii?Q?hBS+a1YDixTP+B5VfBEMaK6e29lYwtRrfBlddr+WsQHML9Gy27InkYgTDy2C?= =?us-ascii?Q?U20sVJNe1RPXgOY8FEqSpBF3PtbziK3mmimPWxVfxKliQL+IIeYnANCTZQLR?= =?us-ascii?Q?4Hkj/4QoEQF36ffJxGJ2gaLgmc7CV6EOgZmN1BMWO3CoqmWkfnFOKr8SAxTK?= =?us-ascii?Q?tA434LEOjfMOnQ6z+3RqMD/4al6jWNoVpHaR50TCZkVDMmL8icp1Mq0PE/aX?= =?us-ascii?Q?Sf7vqoH28ZO7mhnphnZB5ZeSopG+zOwx1bGt02ZEfOvAe5dhnAcY3htC7bd6?= =?us-ascii?Q?4Af184wD9ph31w5RBJSnpAt9/OrvBNXJ/D8UzEtcBlrd2VqzFmssjdf2wgz9?= =?us-ascii?Q?IsRxAqudH1szfpKrLzy0c34LHPj3abhKi3djHjLDYPPjkCriwSwJA1zLmfxy?= =?us-ascii?Q?AnkzRCOzkULECF1ObyN+sbi5hoSHMb7GZae4aHXxwofPt1xKl0CsysGAw4M7?= =?us-ascii?Q?Q55xuBcbhlzIHsHeLjyJoemRJvMJTLBPts2IkXrvoJ2pXPUL3KbkX4nQmYIu?= =?us-ascii?Q?GxhStBMl9vNsfmfefbVoiTVhTHs/XCKTLB/2pgaOoN/BNemhuaxu4IQbfJWB?= =?us-ascii?Q?gT8sW7rq21eGaSdo8N9trpkUucYzpcmKO9DU+NX4CzOn4zv2l3tnIDWHUq+F?= =?us-ascii?Q?VOhO85tGAs0f6oshS0EEZL2TA4wRT1VDQb5Jx87uJe4z1ZQNh6ghfY8LoXZe?= =?us-ascii?Q?Ajc1u6v1834cFc/lEaMlZn8SdUet9WnNOn3ANVhPmAH3dqp5zGIV2oIQy+bw?= =?us-ascii?Q?jXCYd5zGjhrLbh5QPtc3OWnyC+uvXhO1ty36brPsZilg6hlhU/PAFh0l02ef?= =?us-ascii?Q?pXQHsISBnhZ+5CC5CVEVZXROFMVJH+R76E7e+vex4JIjA38GLeyWFfu/mEHW?= =?us-ascii?Q?SLrXCfYnE+7ObG0d9Ti14c7Kp17eSdBc1xuOn7Q6qEKr7I/fj/4br6tg8D6X?= =?us-ascii?Q?MKT7oMM7nfHl7flWIZCFO1GcF/LIowk4sSLnakxhwEBYJ1uNWyl3pucrp2GZ?= =?us-ascii?Q?DTt3fHkeW0kqvAOo12x7Wk76FKs5z3CNwQxecjxhHYhQzKCvpb0FbrPSjnFd?= =?us-ascii?Q?Ncsns20VHUonSPlrIA1MXGG/o5E2PQfqPTmoWQLV6x2qmVtq6h4dediukDPg?= =?us-ascii?Q?WZwhvsUGFjXrsdiinwxCW4FpltwrlgCND3id68D/3WnL0hU2p/r3v5wfRcL6?= =?us-ascii?Q?T7K2Tzsq1fG8yLj3Ik6OOWwPE9+D4zmGpdchI0emorD5j8cXPQ3MZWfONtXT?= =?us-ascii?Q?mm+AlnUrT9nRUKbCiuGx02w4e3mTbAInp97AsmVMmL+mtm7Yi07AKfbCy2uS?= =?us-ascii?Q?Jw/77TZcZ07mgXhKxkbzebZvdAW8+lFCfdIA3c21?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3676dd4f-e1ba-4924-24e4-08dcc6af181f X-MS-Exchange-CrossTenant-AuthSource: DS7PR12MB8252.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Aug 2024 15:44:11.0559 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: YnqcNFFPp5KBWVgjN73slQgkMF2aBCwqgGqJP1JdU7/eexqvJ42eO8ShGwbV/5EMx115hzbSnU6lE31fGXS0Mw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9434 On Mon, Aug 26, 2024 at 04:13:55PM -0500, Mario Limonciello wrote: > From: Mario Limonciello > > AMD systems that support preferred cores will use "166" as their > numerator for max frequency calculations instead of "255". > > Add a function for detecting preferred cores by looking at the > highest perf value on all cores. > > If preferred cores are enabled return 166 and if disabled the > value in the highest perf register. As the function will be called > multiple times, cache the values for the boost numerator and if > preferred cores will be enabled in global variables. > > Signed-off-by: Mario Limonciello > --- [..snip..] > /** > * amd_get_boost_ratio_numerator: Get the numerator to use for boost ratio calculation > * @cpu: CPU to get numerator for. > @@ -162,20 +232,19 @@ EXPORT_SYMBOL_GPL(amd_get_highest_perf); > */ > int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) > { > - struct cpuinfo_x86 *c = &boot_cpu_data; > + bool prefcore; > + int ret; > > - if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) || > - (c->x86_model >= 0x70 && c->x86_model < 0x80))) { > - *numerator = 166; > - return 0; > - } > + ret = amd_detect_prefcore(&prefcore); > + if (ret) > + return ret; > > - if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) || > - (c->x86_model >= 0x40 && c->x86_model < 0x70))) { > - *numerator = 166; > + /* without preferred cores, return the highest perf register value */ > + if (!prefcore) { > + *numerator = boost_numerator; > return 0; > } > - *numerator = 255; > + *numerator = CPPC_HIGHEST_PERF_PREFCORE; Interesting. So even when the user boots a system that supports preferred-cores with "amd_preferred=disable", amd_get_boost_ratio_numerator() will return CPPC_HIGHEST_PERF_PREFCORE as the call prefcore == true here. I suppose that is as intended, since even though the user may not want to use the preferred core logic for task-scheduling/load-balancing, the numerator for the boost-ratio is purely dependent on the h/w capability. Is this understanding correct? If so, can this be included as a comment in the code ? The rest of the patch looks good to me. Reviewed-by: Gautham R. Shenoy -- Thanks and Regards gautham. > > return 0; > } > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index f470b5700db58..ec32c830abc1d 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -807,32 +807,18 @@ static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn); > > static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata) > { > - int ret, prio; > - u32 highest_perf; > - > - ret = amd_get_highest_perf(cpudata->cpu, &highest_perf); > - if (ret) > + /* user disabled or not detected */ > + if (!amd_pstate_prefcore) > return; > > cpudata->hw_prefcore = true; > - /* check if CPPC preferred core feature is enabled*/ > - if (highest_perf < CPPC_MAX_PERF) > - prio = (int)highest_perf; > - else { > - pr_debug("AMD CPPC preferred core is unsupported!\n"); > - cpudata->hw_prefcore = false; > - return; > - } > - > - if (!amd_pstate_prefcore) > - return; > > /* > * The priorities can be set regardless of whether or not > * sched_set_itmt_support(true) has been called and it is valid to > * update them at any time after it has been called. > */ > - sched_set_itmt_core_prio(prio, cpudata->cpu); > + sched_set_itmt_core_prio((int)READ_ONCE(cpudata->highest_perf), cpudata->cpu); > > schedule_work(&sched_prefcore_work); > } > @@ -998,12 +984,12 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) > > cpudata->cpu = policy->cpu; > > - amd_pstate_init_prefcore(cpudata); > - > ret = amd_pstate_init_perf(cpudata); > if (ret) > goto free_cpudata1; > > + amd_pstate_init_prefcore(cpudata); > + > ret = amd_pstate_init_freq(cpudata); > if (ret) > goto free_cpudata1; > @@ -1453,12 +1439,12 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) > cpudata->cpu = policy->cpu; > cpudata->epp_policy = 0; > > - amd_pstate_init_prefcore(cpudata); > - > ret = amd_pstate_init_perf(cpudata); > if (ret) > goto free_cpudata1; > > + amd_pstate_init_prefcore(cpudata); > + > ret = amd_pstate_init_freq(cpudata); > if (ret) > goto free_cpudata1; > @@ -1903,6 +1889,12 @@ static int __init amd_pstate_init(void) > static_call_update(amd_pstate_update_perf, cppc_update_perf); > } > > + if (amd_pstate_prefcore) { > + ret = amd_detect_prefcore(&amd_pstate_prefcore); > + if (ret) > + return ret; > + } > + > /* enable amd pstate feature */ > ret = amd_pstate_enable(true); > if (ret) { > diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h > index 2246ce0630362..1d79320a23490 100644 > --- a/include/acpi/cppc_acpi.h > +++ b/include/acpi/cppc_acpi.h > @@ -137,10 +137,12 @@ struct cppc_cpudata { > }; > > #ifdef CONFIG_CPU_SUP_AMD > +extern int amd_detect_prefcore(bool *detected); > extern int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf); > extern int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator); > #else /* !CONFIG_CPU_SUP_AMD */ > static inline int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf) { return -ENODEV; } > +static inline int amd_detect_prefcore(bool *detected) { return -ENODEV; } > static inline int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator) { return -ENODEV; } > #endif /* !CONFIG_CPU_SUP_AMD */ > > -- > 2.43.0 >