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From: "Gautham R. Shenoy" <gautham.shenoy@amd.com>
To: Mario Limonciello <superm1@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	x86@kernel.org, linux-acpi@vger.kernel.org,
	Perry Yuan <perry.yuan@amd.com>,
	Mario Limonciello <mario.limonciello@amd.com>
Subject: Re: [PATCH 1/2] x86/cpufeatures: Add feature bits for AMD heterogeneous processor
Date: Fri, 4 Oct 2024 09:36:44 +0530	[thread overview]
Message-ID: <Zv9p1MVWa90pxkyb@BLRRASHENOY1.amd.com> (raw)
In-Reply-To: <20241003213759.3038862-2-superm1@kernel.org>

On Thu, Oct 03, 2024 at 04:37:58PM -0500, Mario Limonciello wrote:
> From: Perry Yuan <perry.yuan@amd.com>
> 
> CPUID leaf 0x80000026 advertises core types with different efficiency
> rankings.
> 
> Bit 30 indicates the heterogeneous core topology feature, if the bit
> set, it means not all instances at the current hierarchical level have
> the same core topology.
> 
> This is described in the AMD64 Architecture Programmers Manual Volume
> 2 and 3, doc ID #25493 and #25494.
> 
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>

Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>

> ---
>  arch/x86/include/asm/cpufeatures.h | 1 +
>  arch/x86/kernel/cpu/scattered.c    | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index dd4682857c12..cea1ed82aeb4 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -473,6 +473,7 @@
>  #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */
>  #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
>  #define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* AMD Fast CPPC */
> +#define X86_FEATURE_HETERO_CORE_TOPOLOGY	(21*32 + 6) /* Heterogeneous Core Topology */
>  
>  /*
>   * BUG word(s)
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index c84c30188fdf..3bba55323163 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = {
>  	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
>  	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
>  	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
> +	{ X86_FEATURE_HETERO_CORE_TOPOLOGY,	CPUID_EAX,  30, 0x80000026, 0 },
>  	{ 0, 0, 0, 0, 0 }
>  };
>  
> -- 
> 2.43.0
> 

  reply	other threads:[~2024-10-04  4:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-03 21:37 [PATCH 0/2] Detect max performance values for heterogeneous AMD designs Mario Limonciello
2024-10-03 21:37 ` [PATCH 1/2] x86/cpufeatures: Add feature bits for AMD heterogeneous processor Mario Limonciello
2024-10-04  4:06   ` Gautham R. Shenoy [this message]
2024-10-18 18:24   ` Borislav Petkov
2024-10-18 18:31     ` Mario Limonciello
2024-10-19 10:10       ` Borislav Petkov
2024-10-21 10:32         ` Rafael J. Wysocki
2024-10-21 10:49           ` Borislav Petkov
2024-10-03 21:37 ` [PATCH 2/2] CPPC: Use heterogeneous core topology for identifying boost numerator Mario Limonciello
2024-10-04  4:14   ` Gautham R. Shenoy
2024-10-21 10:58   ` Borislav Petkov
2024-10-21 17:52     ` Mario Limonciello

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