From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E3CC13AA2D; Tue, 3 Feb 2026 20:00:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770148844; cv=none; b=VTaTowldsH19nTwlcdGcBHm5tn0GHNnIRHYv8OauIW2p6kjWa6RKXl8MRikISF+5TCVPdt2PCSaERHQHAWb05tENE1RgUGtSBajuoScSvxULA9gBd++wBuECMgPu4YJFdksZyrwefsfg779hZAMMs+L/Kizn76JT8S4t7jjnuuU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770148844; c=relaxed/simple; bh=eKNCgEBO6pJ63QzdwEPsSvrcDi0qCByDuzz0mMYiFKc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=HOUuNZHcvji/CV3LH3bMZzI3y/fNU0q4Zt0RPdno6CyxX9OJEKa04xqfoo4KnWRht67cgRLe+DqIFeOssyz/S75HEJ4KZjQn+MsPy/sNX8uHVkkHtULMY4ZlfC+tFe9Dn0opcNtwY0oGn1EiPjJACgTL//q9favZ1G7k1NZpdag= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Vgjzg0JC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Vgjzg0JC" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5C604C116D0; Tue, 3 Feb 2026 20:00:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770148843; bh=eKNCgEBO6pJ63QzdwEPsSvrcDi0qCByDuzz0mMYiFKc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Vgjzg0JCTwi6+FOUDOBQKyIoi3VkM882ESZIcy/MG2dCcCJs9Ai4arJyd0ixH8v7m S7It/2f7BM11O0G7UWgPil4+56euEY5wTzKUXrz/IXiLRouE1vxXoSrSuYg+QRj5Zt 9ltn3owIlgdSX0rys2mVxyHescG6B/LRC7Lmaam45gPO9xj3d1bdmLcdCDhiSADNL2 777RTr+vSdumMGGFRngZI+TZ2HzwitiZbd3y7h8kX34Snxiisu/uiy5mP4W1V0Brac ComsQ4qzNb+IUiacCvJBGtYNo7CMxAg39nNbwHdAOyUksePbGrCtKaJZG2ODB6B90l i/ejsWPrZKCag== Date: Tue, 3 Feb 2026 12:00:42 -0800 From: Drew Fustini To: yunhui cui Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Radim =?utf-8?B?S3LEjW3DocWZ?= , Samuel Holland , Adrien Ricciardi , Nicolas Pitre , Kornel =?utf-8?Q?Dul=C4=99ba?= , Atish Patra , Atish Kumar Patra , Vasudevan Srinivasan , Ved Shanbhogue , Chen Pei , Liu Zhiwei , Weiwei Li , guo.wenjia23@zte.com.cn, liu.qingtao2@zte.com.cn, Reinette Chatre , Tony Luck , Babu Moger , Peter Newman , Fenghua Yu , James Morse , Ben Horgan , Dave Martin , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, x86@kernel.org, Rob Herring , "Rafael J. Wysocki" , Len Brown , Robert Moore , Sunil V L , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev, devicetree@vger.kernel.org Subject: Re: [External] [PATCH RFC v2 16/17] acpi: riscv: Parse RISC-V Quality of Service Controller (RQSC) table Message-ID: References: <20260128-ssqosid-cbqri-v2-0-dca586b091b9@kernel.org> <20260128-ssqosid-cbqri-v2-16-dca586b091b9@kernel.org> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Mon, Feb 02, 2026 at 07:08:48PM +0800, yunhui cui wrote: > Hi Drew, > > On Thu, Jan 29, 2026 at 4:28 AM Drew Fustini wrote: > > > > Add driver to parse the ACPI RISC-V Quality of Service Controller (RQSC) > > table which describes the capacity and bandwidth QoS controllers in a > > system. The QoS controllers implement the RISC-V Capacity and Bandwidth > > Controller QoS Register Interface (CBQRI) specification. > > > > Link: https://github.com/riscv-non-isa/riscv-cbqri/releases/tag/v1.0 > > Link: https://github.com/riscv-non-isa/riscv-rqsc/blob/main/src/ > > Signed-off-by: Drew Fustini > > --- > > MAINTAINERS | 1 + > > arch/riscv/include/asm/acpi.h | 10 ++++ > > drivers/acpi/riscv/Makefile | 2 +- > > drivers/acpi/riscv/rqsc.c | 112 ++++++++++++++++++++++++++++++++++++++++++ > > 4 files changed, 124 insertions(+), 1 deletion(-) > > [..] > > +int acpi_parse_rqsc(struct acpi_table_header *table) > > +{ > > + struct acpi_table_rqsc *rqsc; > > + int err; > > + > > + BUG_ON(acpi_disabled); > > + if (!table) { > > + rqsc = acpi_get_rqsc(); > > + if (!rqsc) > > + return -ENOENT; > > + } else { > > + rqsc = (struct acpi_table_rqsc *)table; > > + } > > + > > + for (int i = 0; i < rqsc->num; i++) { > > + struct cbqri_controller_info *ctrl_info; > > + > > + ctrl_info = kzalloc(sizeof(*ctrl_info), GFP_KERNEL); > > + if (!ctrl_info) > > + return -ENOMEM; > > + > > + ctrl_info->type = rqsc->f[i].type; > > + ctrl_info->addr = rqsc->f[i].reg[1]; > > + ctrl_info->size = CBQRI_CTRL_SIZE; > > + ctrl_info->rcid_count = rqsc->f[i].rcid; > > + ctrl_info->mcid_count = rqsc->f[i].mcid; > > + > > + pr_info("Found controller with type %u addr 0x%lx size %lu rcid %u mcid %u", > > + ctrl_info->type, ctrl_info->addr, ctrl_info->size, > > + ctrl_info->rcid_count, ctrl_info->mcid_count); > > + > > + if (ctrl_info->type == CBQRI_CONTROLLER_TYPE_CAPACITY) { > > + ctrl_info->cache.cache_id = rqsc->f[i].res.id1; > > + ctrl_info->cache.cache_level = > > + find_acpi_cache_level_from_id(ctrl_info->cache.cache_id); > > + > > + struct acpi_pptt_cache *cache; > > + > > + cache = find_acpi_cache_from_id(ctrl_info->cache.cache_id); > > + if (cache) { > > + ctrl_info->cache.cache_size = cache->size; > > + } else { > > + pr_warn("%s(): failed to determine size for cache id 0x%x", > > + __func__, ctrl_info->cache.cache_id); > > + ctrl_info->cache.cache_size = 0; > > + } > > + > > + pr_info("Cache controller has ID 0x%x level %u size %u ", > > + ctrl_info->cache.cache_id, ctrl_info->cache.cache_level, > > + ctrl_info->cache.cache_size); > > + > > + /* > > + * For CBQRI, any cpu (technically a hart in RISC-V terms) > > + * can access the memory-mapped registers of any CBQRI > > + * controller in the system. > > + */ > > + err = cpumask_parse("FF", &ctrl_info->cache.cpu_mask); > > Hardcode? acpi_pptt_get_cpumask_from_cache_id(ctrl_info->cache.cache_id, > &ctrl_info->cache.cpu_mask); ? Thanks, I will give that a try as the current value 0xFF is not flexible. Drew