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From: Robin Murphy <robin.murphy@arm.com>
To: will.deacon@arm.com, joro@8bytes.org
Cc: iommu@lists.linux-foundation.org,
	linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
	gakula@caviumnetworks.com, linu.cherian@cavium.com,
	rrichter@cavium.com, lorenzo.pieralisi@arm.com,
	hanjun.guo@linaro.org, john.garry@huawei.com,
	shameerali.kolothum.thodi@huawei.com,
	gabriele.paoloni@huawei.com, stable@vger.kernel.org
Subject: [PATCH v2 2/2] iommu/arm-smmu: Plumb in new ACPI identifiers
Date: Mon, 22 May 2017 16:06:38 +0100	[thread overview]
Message-ID: <ac4e7adc7ca636fc71e6a10f0d8ab273b3dfd5dc.1495459319.git.robin.murphy@arm.com> (raw)
In-Reply-To: <11ef7d28c535c01d42b7b3c8e632934f0e0f1048.1495459319.git.robin.murphy@arm.com>

Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
ThunderX implementation. Wire them up so that we can probe these models
once firmware starts using the new codes, and so that the appropriate
features and quirks get enabled when we do.

For the sake of backports and mitigating sychronisation problems with
the ACPICA headers, we'll carry a backup copy of the new definitions
locally for the short term to make life simpler.

CC: stable@vger.kernel.org # 4.10
Acked-by: Robert Richter <rrichter@cavium.com>
Tested-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---

v2: Add local backup definitions

This is ready to go regardless of patch 1. The stable backport is in likely
anticipation of machines with updated firmware paired with stable distro
kernels, which would be unable to recognise and probe the SMMU otherwise.

Robin.

 drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 7ec30b08b3bd..79b9bb7d4783 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -312,6 +312,14 @@ enum arm_smmu_implementation {
 	CAVIUM_SMMUV2,
 };
 
+/* Until ACPICA headers cover IORT rev. C */
+#ifndef ACPI_IORT_SMMU_CORELINK_MMU401
+#define ACPI_IORT_SMMU_CORELINK_MMU401	0x4
+#endif
+#ifndef ACPI_IORT_SMMU_CAVIUM_SMMUV2
+#define ACPI_IORT_SMMU_CAVIUM_SMMUV2	0x5
+#endif
+
 struct arm_smmu_s2cr {
 	struct iommu_group		*group;
 	int				count;
@@ -2073,6 +2081,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
 		smmu->version = ARM_SMMU_V1;
 		smmu->model = GENERIC_SMMU;
 		break;
+	case ACPI_IORT_SMMU_CORELINK_MMU401:
+		smmu->version = ARM_SMMU_V1_64K;
+		smmu->model = GENERIC_SMMU;
+		break;
 	case ACPI_IORT_SMMU_V2:
 		smmu->version = ARM_SMMU_V2;
 		smmu->model = GENERIC_SMMU;
@@ -2081,6 +2093,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
 		smmu->version = ARM_SMMU_V2;
 		smmu->model = ARM_MMU500;
 		break;
+	case ACPI_IORT_SMMU_CAVIUM_SMMUV2:
+		smmu->version = ARM_SMMU_V2;
+		smmu->model = CAVIUM_SMMUV2;
+		break;
 	default:
 		ret = -ENODEV;
 	}
-- 
2.12.2.dirty


  reply	other threads:[~2017-05-22 15:07 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-22 15:06 [PATCH v2 1/2] ACPICA: IORT: Update SMMU models for IORT rev. C Robin Murphy
2017-05-22 15:06 ` Robin Murphy [this message]
     [not found] ` <11ef7d28c535c01d42b7b3c8e632934f0e0f1048.1495459319.git.robin.murphy-5wv7dgnIgG8@public.gmane.org>
2017-05-22 15:49   ` Robert Richter
     [not found]     ` <20170522154917.GA16981-vWBEXY7mpu582hYKe6nXyg@public.gmane.org>
2017-05-22 15:53       ` Robert Richter
2017-05-30  9:12 ` Joerg Roedel
2017-05-31 12:21   ` Robin Murphy
2017-06-06  8:43 ` Hanjun Guo

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