Re: [PATCH v10 0/8] ACPI: Unify CPU UID interface and fix ARM64 TPH steer-tag issue

Catalin Marinas
2026-03-31T17:31:43Z

On Fri, Mar 20, 2026 at 11:17:29AM +0800, Chengwen Feng wrote:
> This patchset unifies ACPI Processor UID retrieval across
> arm64/loongarch/riscv/x86 via acpi_get_cpu_uid() (with input validation)
> and fixes ARM64 CPU steer-tag retrieval failure in PCI/TPH:
>
> 1-4: Add acpi_get_cpu_uid() for arm64/loongarch/riscv/x86 (update
> respective users)
> 5: Centralize acpi_get_cpu_uid() declaration in include/linux/acpi.h
> 6: Clean up perf/arm_cspmu
> 7: Clean up ACPI/PPTT and remove unused get_acpi_id_for_cpu()
> 8: Pass ACPI Processor UID to Cache Locality _DSM
>
> The interface refactor ensures consistent CPU UID retrieval across
> architectures (no functional changes for valid inputs) and provides the
> unified interface required for the ARM64 TPH fix.
>
> ---
> Changes in v10:
> - Refine commit header&log according to Punit's and Bjorn's review
> - Split perf/arm_cspmu as a separate commit which address Punit's
> review
>
> Changes in v9:
> - Address Bjorn's review: split commits to each platform so that make
> them easy to review
>
> Changes in v8:
> - Moving arm64's get_cpu_for_acpi_id() to kernel/acpi.c which address
> Jeremy's review
>
> Chengwen Feng (8):
> arm64: acpi: Add acpi_get_cpu_uid() for unified ACPI CPU UID retrieval
> LoongArch: Add acpi_get_cpu_uid() for unified ACPI CPU UID retrieval
> RISC-V: ACPI: Add acpi_get_cpu_uid() for unified ACPI CPU UID
> retrieval
> x86/acpi: Add acpi_get_cpu_uid() for unified ACPI CPU UID retrieval
> ACPI: Centralize acpi_get_cpu_uid() declaration in
> include/linux/acpi.h
> perf: arm_cspmu: Switch to acpi_get_cpu_uid() from
> get_acpi_id_for_cpu()
> ACPI: PPTT: Use acpi_get_cpu_uid() and remove get_acpi_id_for_cpu()
> PCI/TPH: Pass ACPI Processor UID to Cache Locality _DSM
>
> Documentation/PCI/tph.rst | 4 +--
> arch/arm64/include/asm/acpi.h | 17 +---------
> arch/arm64/kernel/acpi.c | 30 ++++++++++++++++++

For the arm64 bits:

Acked-by: Catalin Marinas <catalin.marinas@arm.com>