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From: Thomas Gleixner <tglx@linutronix.de>
To: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: rjw@rjwysocki.net, mingo@redhat.com, bp@suse.de, x86@kernel.org,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-acpi@vger.kernel.org, peterz@infradead.org,
	tim.c.chen@linux.intel.com
Subject: Re: [PATCH v3 1/8] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT
Date: Sat, 10 Sep 2016 15:10:43 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.20.1609101505290.2804@nanos> (raw)
In-Reply-To: <1473373615-51427-2-git-send-email-srinivas.pandruvada@linux.intel.com>

On Thu, 8 Sep 2016, Srinivas Pandruvada wrote:
> From: Tim Chen <tim.c.chen@linux.intel.com>
> 
> We uses ASYM_PACKING feature in the scheduler to move tasks to more
> capable cpus that can be boosted to higher frequency. This is enabled by
> Intel Turbo Boost Max Technology 3.0 (ITMT).  We mark the sched domain
> topology level with SD_ASYM_PACKING flag for such systems to indicate
> scheduler can use the ASYM_PACKING feature to move load to the
> more capable cpus.

Sigh. This changelog does not tell anything about the nature of the patch,
the rationale for it etc. It's just a meaningless blurb.


> +unsigned int __read_mostly sysctl_sched_itmt_enabled;
> +
>  static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
>  {
>  	unsigned long flags;
> @@ -471,31 +473,57 @@ static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
>  	return false;
>  }
>  
> -static struct sched_domain_topology_level numa_inside_package_topology[] = {
> +#ifdef CONFIG_SCHED_ITMT
> +static int x86_core_flags(void)
> +{
> +	int flags = cpu_core_flags();
> +
> +	if (sysctl_sched_itmt_enabled)
> +		flags |= SD_ASYM_PACKING;
> +
> +	return flags;
> +}
> +
> +static int x86_smt_flags(void)
> +{
> +	int flags = cpu_smt_flags();
> +
> +	if (sysctl_sched_itmt_enabled)
> +		flags |= SD_ASYM_PACKING;
> +
> +	return flags;
> +}
> +#else
> +#define x86_core_flags cpu_core_flags
> +#define x86_smt_flags cpu_smt_flags
> +#endif

No. We first rework the code so that the IMT stuff can be added in a later
patch easily.

Thanks,

	tglx





  reply	other threads:[~2016-09-10 13:10 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-08 22:26 [PATCH v3 0/8] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-09-08 22:26 ` [PATCH v3 1/8] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT Srinivas Pandruvada
2016-09-10 13:10   ` Thomas Gleixner [this message]
2016-09-12 20:50     ` Tim Chen
2016-09-13  7:26       ` Peter Zijlstra
2016-09-19  9:11         ` Jiri Olsa
2016-09-19 16:01           ` Tim Chen
2016-09-10 13:13   ` Thomas Gleixner
2016-09-08 22:26 ` [PATCH v3 2/8] sched: Extend scheduler's asym packing Srinivas Pandruvada
2016-09-08 22:26 ` [PATCH v3 3/8] x86, cpu: provide a function topology_num_packages to enumerate #packages Srinivas Pandruvada
2016-09-10 13:28   ` Thomas Gleixner
2016-09-12 20:51     ` Tim Chen
2016-09-08 22:26 ` [PATCH v3 4/8] sched, x86: use arch_update_cpu_topology to indicate x86 need sched domain rebuild Srinivas Pandruvada
2016-09-10 16:20   ` Thomas Gleixner
2016-09-12 21:00     ` Tim Chen
2016-09-08 22:26 ` [PATCH v3 5/8] sched,x86: Enable Turbo Boost Max Technology Srinivas Pandruvada
2016-09-10 16:21   ` Thomas Gleixner
2016-09-12 21:34     ` Tim Chen
2016-09-08 22:26 ` [PATCH v3 6/8] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
2016-09-08 22:26 ` [PATCH v3 7/8] acpi: bus: Set _OSC for diverse core support Srinivas Pandruvada
2016-09-08 22:26 ` [PATCH v3 8/8] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
2016-09-10 16:22   ` Thomas Gleixner
2016-09-12 22:34     ` Srinivas Pandruvada

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