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From: Alison Schofield <alison.schofield@intel.com>
To: Leon Romanovsky <leon@kernel.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>,
	Saket Dumbre <saket.dumbre@intel.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Logan Gunthorpe <logang@deltatee.com>,
	<linux-acpi@vger.kernel.org>, <acpica-devel@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	Lukas Wunner <lukas@wunner.de>,
	"Natu, Mahesh" <mahesh.natu@intel.com>
Subject: Re: [PATCH RFC 0/7] PCI/HMAT: Describe P2PDMA reachability and performance
Date: Mon, 24 Aug 2026 13:15:34 -0700	[thread overview]
Message-ID: <aoymZhOaSCG_Tsmj@aschofie-mobl2.lan> (raw)
In-Reply-To: <20260812-hmat-p2p-v1-0-75ac41380585@nvidia.com>

On Wed, Aug 12, 2026 at 10:47:37PM +0300, Leon Romanovsky wrote:
> Linux derives P2PDMA reachability from visible PCI topology, ACS
> configuration, and a host-bridge whitelist. It cannot describe conditional
> or slower cross-host-bridge paths; passthrough can hide the physical peer
> relationships.
> 
> This RFC series implements the proposed ACPI HMAT Type 3 extension below.

Hi Leon,

Is there an ECN document for review alongside this?
I get that the table below is a snapshot of the expected change, but
would appreciate the long version to read.

Please add linux-cxl to CC list on future postings.

-- Alison


> Directional Generic Port matrices describe reachability, ordering, latency,
> and bandwidth. Linux uses ordered paths to authorize P2PDMA and their
> latency/bandwidth to rank providers. A VMM could translate these matrices
> into guest domains; that is outside this series.
> 
>   HMAT Type 3 structure
> 
>   Field               Offset       Bytes  Meaning
>   ---------------------------------------------------------------
>   Type:                    0           2  value 3
>   Length:                  4           4  entire structure
>   Flags:                   8           1  traffic classes
>   Data-type:               9           1  metric selector
>   Initiators:             12           4  Generic Port count (s)
>   Targets:                16           4  Generic Port count (t)
>   Base-unit:              24           8  ps or MB/s; non-zero
>   Initiator-PDs:          32         4*s  proximity-domain list
>   Target-PDs:         32+4*s         4*t  proximity-domain list
>   Matrix:         32+4*(s+t)       2*s*t  directional Entry[i][j]
>   Reserved: bytes 2-3, 10-11, and 20-23
> 
>   Flags: encoding
>     bit 0  non-UIO
>     bit 1  UIO
> 
>   Metrics: selector
>     0/1/2  access/read/write latency
>     3/4/5  access/read/write bandwidth
> 
>   Direction: Initiator PD[i] -- Entry[i][j] metric --> Target PD[j]
> 
> ----------------------------------------------------------------------
> Based on [PATCH v3 00/17] PCI/P2PDMA: Fix ACS egress control handling
> https://lore.kernel.org/all/20260811-fix-p2p-acs-v3-0-efc488ee7c03@nvidia.com/
> 
> Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
> ---
> Leon Romanovsky (7):
>       ACPICA: Define PCIe P2P latency and bandwidth information
>       ACPI: HMAT: Make PCIe P2P paths available to consumers
>       PCI/P2PDMA: Authorize HMAT-described cross-host-bridge P2P
>       PCI/P2PDMA: Prefer providers with better HMAT performance
>       ACPI: HMAT: Add KUnit tests for PCIe P2P matrix semantics
>       PCI/P2PDMA: Add KUnit tests for HMAT policy boundaries
>       PCI/P2PDMA: Add KUnit tests for HMAT provider ranking
> 
>  drivers/acpi/numa/Kconfig     |  13 ++
>  drivers/acpi/numa/Makefile    |   1 +
>  drivers/acpi/numa/hmat.c      | 245 +++++++++++++++++++++-
>  drivers/acpi/numa/hmat_test.c | 223 ++++++++++++++++++++
>  drivers/acpi/numa/hmat_test.h |  17 ++
>  drivers/pci/Kconfig           |  14 ++
>  drivers/pci/Makefile          |   1 +
>  drivers/pci/p2pdma.c          | 300 ++++++++++++++++++++------
>  drivers/pci/p2pdma_test.c     | 477 ++++++++++++++++++++++++++++++++++++++++++
>  drivers/pci/pci.h             |  23 ++
>  include/acpi/actbl1.h         |  27 ++-
>  include/linux/acpi.h          |  26 +++
>  12 files changed, 1298 insertions(+), 69 deletions(-)
> ---
> base-commit: bc5261fca94dd94ab557cc0852ce465d9c3ab8b0
> change-id: 20260715-hmat-p2p-eb4971a9d731
> 
> Best regards,
> --  
> Leon Romanovsky <leonro@nvidia.com>
> 

  parent reply	other threads:[~2026-08-24 20:15 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-12 19:47 [PATCH RFC 0/7] PCI/HMAT: Describe P2PDMA reachability and performance Leon Romanovsky
2026-08-12 19:47 ` [PATCH RFC 1/7] ACPICA: Define PCIe P2P latency and bandwidth information Leon Romanovsky
2026-08-13 10:13   ` Rafael J. Wysocki (Intel)
2026-08-13 11:01     ` Leon Romanovsky
2026-08-12 19:47 ` [PATCH RFC 2/7] ACPI: HMAT: Make PCIe P2P paths available to consumers Leon Romanovsky
2026-08-12 19:47 ` [PATCH RFC 3/7] PCI/P2PDMA: Authorize HMAT-described cross-host-bridge P2P Leon Romanovsky
2026-08-12 19:47 ` [PATCH RFC 4/7] PCI/P2PDMA: Prefer providers with better HMAT performance Leon Romanovsky
2026-08-14  3:50   ` Logan Gunthorpe
2026-08-16 12:38     ` Leon Romanovsky
2026-08-17 16:09       ` Logan Gunthorpe
2026-08-17 18:27         ` Leon Romanovsky
2026-08-12 19:47 ` [PATCH RFC 5/7] ACPI: HMAT: Add KUnit tests for PCIe P2P matrix semantics Leon Romanovsky
2026-08-12 19:47 ` [PATCH RFC 6/7] PCI/P2PDMA: Add KUnit tests for HMAT policy boundaries Leon Romanovsky
2026-08-12 19:47 ` [PATCH RFC 7/7] PCI/P2PDMA: Add KUnit tests for HMAT provider ranking Leon Romanovsky
2026-08-24 20:15 ` Alison Schofield [this message]
2026-08-24 20:24   ` [PATCH RFC 0/7] PCI/HMAT: Describe P2PDMA reachability and performance Natu, Mahesh

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