Re: Centrino speedstep

Johan Vromans
2004-12-29T21:33:26Z

Dominik Brodowski <linux-X3ehHDuj6sIIGcDfoQAp7BvVK+yQ3ZXh@public.gmane.org> writes:

> You should fix the DSDT and replace the frequency value of the P0
> state with 1500 instead of 1600. Else frequency calculations in the
> kernel get mixed up which can cause too short or too long delays.

I've already fixed my DSDT to compile, so this would be easily added
... if I knew where. Can you point me in the right direction?

-- Johan

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