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* IBM T41 + ACPI + APIC
@ 2004-08-12 12:02 Paul Ionescu
  0 siblings, 0 replies; 4+ messages in thread
From: Paul Ionescu @ 2004-08-12 12:02 UTC (permalink / raw)
  To: acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f

Hi,

I have an IBM T41 with FC2.
I compiled a 2.6.8-rc3 kernel with ACPI and LAPIC support.
In dmesg I find:

......
Local APIC disabled by BIOS -- reenabling.
Found and enabled local APIC!
......
ACPI: Using PIC for interrupt routing
ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 9 *10 11)
ACPI: PCI Interrupt Link [LNKB] (IRQs *3 4 5 6 7 9 10 11)
......

Is something wrong with my local APIC ? 
Why ACPI is still using PIC instead of LAPIC ?
No sign of LAPIC in /proc/interupts :

cat /proc/interrupts 
           CPU0       
  0:   13340193          XT-PIC  timer
  1:      12558          XT-PIC  i8042
  2:          0          XT-PIC  cascade
  3:          0          XT-PIC  Intel 82801DB-ICH4
  4:          0          XT-PIC  uhci_hcd
  5:        246          XT-PIC  uhci_hcd
  8:          1          XT-PIC  rtc
  9:      13952          XT-PIC  acpi
 10:      74704          XT-PIC  uhci_hcd, eth0
 12:     225583          XT-PIC  i8042
 14:     102543          XT-PIC  ide0
 15:       7076          XT-PIC  ide1
NMI:          0 
ERR:          0

Thanks,
Paul




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^ permalink raw reply	[flat|nested] 4+ messages in thread

* RE: IBM T41 + ACPI + APIC
@ 2004-08-12 16:50 Grover, Andrew
       [not found] ` <F760B14C9561B941B89469F59BA3A8470726A996-sBd4vmA9Se6krb+BlOpmy7fspsVTdybXVpNB7YpNyf8@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Grover, Andrew @ 2004-08-12 16:50 UTC (permalink / raw)
  To: Paul Ionescu, acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f

> From: Paul Ionescu
> I have an IBM T41 with FC2.
> I compiled a 2.6.8-rc3 kernel with ACPI and LAPIC support.
> In dmesg I find:
> 
> ......
> Local APIC disabled by BIOS -- reenabling.
> Found and enabled local APIC!
> ......
> ACPI: Using PIC for interrupt routing
> ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 9 *10 11)
> ACPI: PCI Interrupt Link [LNKB] (IRQs *3 4 5 6 7 9 10 11)
> ......
> 
> Is something wrong with my local APIC ? 
> Why ACPI is still using PIC instead of LAPIC ?
> No sign of LAPIC in /proc/interupts :

You need an IOAPIC. The local APIC is basically just the part of the CPU
that receives messages from the IOAPIC, if present.

PIC works just fine on a UP machine, so no worries.

Regards -- Andy


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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: IBM T41 + ACPI + APIC
       [not found] ` <F760B14C9561B941B89469F59BA3A8470726A996-sBd4vmA9Se6krb+BlOpmy7fspsVTdybXVpNB7YpNyf8@public.gmane.org>
@ 2004-08-12 17:00   ` Nathan Bryant
       [not found]     ` <411BA242.6010103-p32f3XyCuykqcZcGjlUOXw@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Nathan Bryant @ 2004-08-12 17:00 UTC (permalink / raw)
  To: Grover, Andrew; +Cc: Paul Ionescu, acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f

Grover, Andrew wrote:

> You need an IOAPIC. The local APIC is basically just the part of the CPU
> that receives messages from the IOAPIC, if present.

By the way, it is a bad idea to use front-side-bus interrupt delivery on 
some (all?) Intel mobile processors/chipsets. This prevents entering C3, 
if I remember correctly. The real details are in the i850-M databook...

Does turning on IOAPIC+local APIC enable FSB-interrupt mode in Linux? 
What about also turning on message-signalled interrupts? Seems we use 
the local-apic instead of the IO(x)APIC for MSI.


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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: IBM T41 + ACPI + APIC
       [not found]     ` <411BA242.6010103-p32f3XyCuykqcZcGjlUOXw@public.gmane.org>
@ 2004-08-12 19:56       ` Frank Mehnert
  0 siblings, 0 replies; 4+ messages in thread
From: Frank Mehnert @ 2004-08-12 19:56 UTC (permalink / raw)
  To: acpi-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f

[-- Attachment #1: Type: text/plain, Size: 829 bytes --]

On Thursday 12 August 2004 19:00, Nathan Bryant wrote:
> Grover, Andrew wrote:
> > You need an IOAPIC. The local APIC is basically just the part of the CPU
> > that receives messages from the IOAPIC, if present.
>
> By the way, it is a bad idea to use front-side-bus interrupt delivery on
> some (all?) Intel mobile processors/chipsets. This prevents entering C3,
> if I remember correctly. The real details are in the i850-M databook...

BTW: Why does Linux not use the Local APIC timer as a source for timer 
interrupts? Using the Local APIC timer saves the kernel from acknowledging
the PIT IRQ. Acknowledging the Local APIC IRQ is _much_ cheaper.

Frank
-- 
## Dept. of Computer Science, Dresden University of Technology, Germany ##
## http://os.inf.tu-dresden.de/~fm3                                     ##

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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2004-08-12 19:56 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2004-08-12 12:02 IBM T41 + ACPI + APIC Paul Ionescu
  -- strict thread matches above, loose matches on Subject: below --
2004-08-12 16:50 Grover, Andrew
     [not found] ` <F760B14C9561B941B89469F59BA3A8470726A996-sBd4vmA9Se6krb+BlOpmy7fspsVTdybXVpNB7YpNyf8@public.gmane.org>
2004-08-12 17:00   ` Nathan Bryant
     [not found]     ` <411BA242.6010103-p32f3XyCuykqcZcGjlUOXw@public.gmane.org>
2004-08-12 19:56       ` Frank Mehnert

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