From: Richard Henderson <rth@twiddle.net>
To: Michael Cree <mcree@orcon.net.nz>
Cc: Dave Airlie <airlied@gmail.com>,
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>,
mattst88@gmail.com, linux-kernel@vger.kernel.org,
linux-alpha@vger.kernel.org, ink@jurassic.park.msu.ru,
jbarnes@virtuousgeek.org, linux-pci@vger.kernel.org,
dri-devel@lists.freedesktop.org, alexdeucher@gmail.com,
jglisse@redhat.com
Subject: Re: Problems with alpha/pci + radeon/ttm
Date: Mon, 28 Jun 2010 09:08:40 -0700 [thread overview]
Message-ID: <4C28C908.8090808@twiddle.net> (raw)
In-Reply-To: <4C286568.60901@orcon.net.nz>
On 06/28/2010 02:03 AM, Michael Cree wrote:
> On 28/06/10 11:14, Dave Airlie wrote:
>> The bus error is caused by the kernel, its something alpha specific
>> with how mmap works,
>> I'm not sure if alpha needs some special mmap flags or something,
>
> Neither am I. All I know is that Alpha reorders CPU instructions more
> aggressively than most other architectures, the page map size is 8kB,
> and memory accesses must be aligned to the datum size.
There are no special mmap flags on alpha. The non-cacheable property
is a function of the physical address (e.g. bit 40 set for ev5), and
this has already been taken care of by the kernel.
r~
next prev parent reply other threads:[~2010-06-28 16:08 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-21 21:19 Problems with alpha/pci + radeon/ttm Matt Turner
2010-06-22 5:59 ` FUJITA Tomonori
2010-06-22 8:32 ` Dave Airlie
2010-06-24 9:51 ` Michael Cree
2010-06-24 15:02 ` Matt Turner
2010-06-27 4:20 ` FUJITA Tomonori
2010-06-27 10:46 ` Michael Cree
2010-06-27 23:14 ` Dave Airlie
2010-06-28 9:03 ` Michael Cree
2010-06-28 16:08 ` Richard Henderson [this message]
2010-06-24 14:53 ` Matt Turner
2010-06-27 4:20 ` FUJITA Tomonori
2010-06-27 4:58 ` Matt Turner
2010-06-30 18:43 ` Konrad Rzeszutek Wilk
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