From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Laight Subject: RE: [PATCH v2 2/6] bitops: always define asm-generic non-atomic bitops Date: Mon, 13 Jun 2022 21:29:46 +0000 Message-ID: <5d65491caf6249c8b72c7a6ced95614c@AcuMS.aculab.com> References: <20220610113427.908751-1-alexandr.lobakin@intel.com> <20220610113427.908751-3-alexandr.lobakin@intel.com> <22042c14bc6a437d9c6b235fbfa32c8a@intel.com> <20220613141947.1176100-1-alexandr.lobakin@intel.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8BIT Return-path: In-Reply-To: Content-Language: en-US List-ID: Content-Type: text/plain; charset="us-ascii" To: "'Luck, Tony'" , "Lobakin, Alexandr" , Marco Elver Cc: Andy Shevchenko , Arnd Bergmann , Yury Norov , Mark Rutland , Matt Turner , Brian Cain , Geert Uytterhoeven , Yoshinori Sato , Rich Felker , "David S. Miller" , Kees Cook , "Peter Zijlstra (Intel)" , Borislav Petkov , Greg Kroah-Hartman , "linux-alpha@vger.kernel.org" , "linux-hexagon@vger.kernel.org" , "linux-ia64@vger.kernel.org" , linux-m68k@lists.linux-m6 From: Luck, Tony > Sent: 13 June 2022 17:27 > > >> It's listed in Documentation/atomic_bitops.txt. > > > > Oh, so my memory was actually correct that I saw it in the docs > > somewhere. > > WDYT, should I mention this here in the code (block comment) as well > > that it's atomic and must not lose `volatile` as Andy suggested or > > it's sufficient to have it in the docs (+ it's not underscored)? > > I think a comment that the "volatile" is required to prevent re-ordering > is enough. > > But maybe others are sufficiently clear on the meaning? I once wasted > time looking for the non-atomic __test_bit() version (to use in some code > that was already protected by a spin lock, so didn't need the overhead > of an "atomic" version) before realizing there wasn't a non-atomic one. Does it make any sense for 'test bit' to be atomic? I'm not even sure is needs any ordering constraints either. The result is always stale - the value can be changed by another cpu at any time. The set/clear atomic bit-ops require a RMW bus cycle - which has to be locked (or similar) to avoid corruption. The atomic 'test and set' (etc) are RMW and return a valid state. David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)