From: George Stark <gnstark@salutedevices.com>
To: kelvin.zhang@amlogic.com,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Kevin Hilman" <khilman@baylibre.com>,
"Jerome Brunet" <jbrunet@baylibre.com>,
"Martin Blumenstingl" <martin.blumenstingl@googlemail.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>
Cc: <linux-pwm@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Junyi Zhao <junyi.zhao@amlogic.com>,
"kernel@salutedevices.com" <kernel@salutedevices.com>
Subject: Re: [DMARC error][DKIM error] [PATCH v5 2/2] arm64: dts: amlogic: Add Amlogic S4 PWM
Date: Wed, 22 May 2024 01:17:54 +0300 [thread overview]
Message-ID: <11ad766f-0fc7-4d26-aad6-a98095986b24@salutedevices.com> (raw)
In-Reply-To: <20240521-s4-pwm-v5-2-0c91f5fa32cd@amlogic.com>
Hello Kelvin, Junyi
On 5/21/24 11:31, Kelvin Zhang via B4 Relay wrote:
> From: Junyi Zhao <junyi.zhao@amlogic.com>
>
> Add device nodes for PWM_AB, PWM_CD, PWM_EF, PWM_GH and PWM_IJ
> along with GPIO PIN configs of each channel.
>
> Signed-off-by: Junyi Zhao <junyi.zhao@amlogic.com>
> Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com>
> ---
> arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 207 ++++++++++++++++++++++++++++++
> 1 file changed, 207 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> index 10896f9df682..d0c170368892 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> @@ -292,6 +292,168 @@ mux {
> };
> };
>
...
> @@ -449,6 +611,51 @@ i2c4: i2c@6e000 {
> status = "disabled";
> };
>
> + pwm_ab: pwm@58000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x58000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_A>,
> + <&clkc_periphs CLKID_PWM_B>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + pwm_cd: pwm@5a000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x5a000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_C>,
> + <&clkc_periphs CLKID_PWM_D>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + pwm_ef: pwm@5c000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x5c000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_E>,
> + <&clkc_periphs CLKID_PWM_F>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + pwm_gh: pwm@5e000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x5e000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_G>,
> + <&clkc_periphs CLKID_PWM_H>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + pwm_ij: pwm@60000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x60000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_I>,
> + <&clkc_periphs CLKID_PWM_J>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> nand: nand-controller@8c800 {
> compatible = "amlogic,meson-axg-nfc";
> reg = <0x0 0x8c800 0x0 0x100>, <0x0 0x8c000 0x0 0x4>;
>
Nodes on any bus, thus using unit addresses for children, shall be
ordered by unit address in ascending order.
So the pwm_xx nodes should be placed between spicc0: spi@50000 and
i2c0: i2c@66000 nodes
--
Best regards
George
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linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
prev parent reply other threads:[~2024-05-21 22:18 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-21 8:31 [PATCH v5 0/2] Add support for Amlogic S4 PWM Kelvin Zhang via B4 Relay
2024-05-21 8:31 ` [PATCH v5 1/2] pwm: meson: " Kelvin Zhang via B4 Relay
2024-05-21 18:50 ` [DMARC error][DKIM error] " George Stark
2024-05-22 6:02 ` Junyi Zhao
2024-05-21 8:31 ` [PATCH v5 2/2] arm64: dts: amlogic: Add " Kelvin Zhang via B4 Relay
2024-05-21 22:17 ` George Stark [this message]
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