[PATCH 0/2] Ethernet PHY interrupt improvements

[PATCH 0/2] Ethernet PHY interrupt improvements

[Martin Blumenstingl]

this small series consists of two patches:
#1 documents the GPIO to which the PHY's interrupt line is connected
   (the name "MAC_INTR" is used in the schematics of Odroid-C2 and
    Khadas VIM2)
#2 adds the RTL8211F PHY's interrupt line on Khadas VIM2

I was a bit surprised to see that the GXM Q200 board seems to use
GPIOH_3 instead of GPIOZ_15 like all other boards.
@Jerome: could you please check if GPIOH_3 is correct or if it's
a "copy-and-paste" issue (Q200 is the only GXL/GXM based board.
GXL/GXM SoCs have fewer GPIOAO pins than GXBB, so the interrupt
offset for the same non-GPIOAO pin is different than on GXBB)

compile-tested: all boards
runtime tested: Khadas VIM2 (unplugging / plugging the Ethernet
cable increases the interrupt counter in /proc/interrupts and the
kernel correctly reports that the cable has been {un,}plugged)


Martin Blumenstingl (2):
  ARM64: dts: meson: add comments with the GPIO for the PHY interrupts
  ARM64: dts: meson-gxm: add the PHY interrupt line on Khadas VIM2

 arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts  | 1 +
 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts   | 2 ++
 arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts       | 1 +
 arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 3 +++
 arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts        | 1 +
 5 files changed, 8 insertions(+)

-- 
2.15.1

[PATCH 1/2] ARM64: dts: meson: add comments with the GPIO for the PHY interrupts

[Martin Blumenstingl]

Currently one has to look/calculate the GPIO for the PHY interrupts
manually. Add a comment for the existing PHY interrupt lines to make it
easier to find out which GPIO is used.
This is done using the following calculation:
- number of GPIO AO pins (14 on GXBB: GPIOAO_0..13)
- add the offset of the pin which is used for the interrupt (for example
  GPIOZ_15 = 15 on Odroid-C2)

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 1 +
 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts  | 2 ++
 arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts      | 1 +
 arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts       | 1 +
 4 files changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index 4a4251001bfd..011e8e08e429 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -169,6 +169,7 @@
 			/* Realtek RTL8211F (0x001cc916) */
 			reg = <0>;
 			interrupt-parent = <&gpio_intc>;
+			/* MAC_INTR on GPIOZ_15 */
 			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
 		};
 	};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index f8d221463c60..dde3cb894c19 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -156,8 +156,10 @@
 		#size-cells = <0>;
 
 		eth_phy0: ethernet-phy at 0 {
+			/* Realtek RTL8211F (0x001cc916) */
 			reg = <0>;
 			interrupt-parent = <&gpio_intc>;
+			/* MAC_INTR on GPIOZ_15 */
 			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
 			eee-broken-1000t;
 		};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
index 9bf16bb7c491..09f34f7ef084 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
@@ -118,6 +118,7 @@
 			/* Micrel KSZ9031 (0x00221620) */
 			reg = <3>;
 			interrupt-parent = <&gpio_intc>;
+			/* MAC_INTR on GPIOZ_15 */
 			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
 		};
 	};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
index 66c6da7e112c..9847fce443a8 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
@@ -111,6 +111,7 @@
 		reg = <0>;
 		max-speed = <1000>;
 		interrupt-parent = <&gpio_intc>;
+		/* MAC_INTR on GPIOH_3 */
 		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
-- 
2.15.1

[PATCH 1/2] ARM64: dts: meson: add comments with the GPIO for the PHY interrupts

[Jerome Brunet]

On Sat, 2017-12-02 at 22:40 +0100, Martin Blumenstingl wrote:
> Currently one has to look/calculate the GPIO for the PHY interrupts
> manually. Add a comment for the existing PHY interrupt lines to make it
> easier to find out which GPIO is used.
> This is done using the following calculation:
> - number of GPIO AO pins (14 on GXBB: GPIOAO_0..13)
> - add the offset of the pin which is used for the interrupt (for example
>   GPIOZ_15 = 15 on Odroid-C2)
> 

Reviewed-By: Jerome Brunet <jbrunet@baylibre.com>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

[PATCH 2/2] ARM64: dts: meson-gxm: add the PHY interrupt line on Khadas VIM2

[Martin Blumenstingl]

The INTB/PMEB pin of the RTL8211F PHY on the Khadas VIM2 is routed to
GPIOZ_15. Add the corresponding interrupt using the GPIO interrupt
controller so the PHY framework doesn't have to poll the PHY for it's
status.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 34a41b26a4ed..5c2bc2989519 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -232,6 +232,9 @@
 	external_phy: ethernet-phy at 0 {
 		/* Realtek RTL8211F (0x001cc916) */
 		reg = <0>;
+		interrupt-parent = <&gpio_intc>;
+		/* MAC_INTR on GPIOZ_15 */
+		interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
 
-- 
2.15.1

[PATCH 2/2] ARM64: dts: meson-gxm: add the PHY interrupt line on Khadas VIM2

[Jerome Brunet]

On Sat, 2017-12-02 at 22:40 +0100, Martin Blumenstingl wrote:
> The INTB/PMEB pin of the RTL8211F PHY on the Khadas VIM2 is routed to
> GPIOZ_15. Add the corresponding interrupt using the GPIO interrupt
> controller so the PHY framework doesn't have to poll the PHY for it's
> status.
> 

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

[PATCH 0/2] Ethernet PHY interrupt improvements

[Jerome Brunet]

On Sat, 2017-12-02 at 22:40 +0100, Martin Blumenstingl wrote:
> this small series consists of two patches:
> #1 documents the GPIO to which the PHY's interrupt line is connected
>    (the name "MAC_INTR" is used in the schematics of Odroid-C2 and
>     Khadas VIM2)
> #2 adds the RTL8211F PHY's interrupt line on Khadas VIM2
> 
> I was a bit surprised to see that the GXM Q200 board seems to use
> GPIOH_3 instead of GPIOZ_15 like all other boards.
> @Jerome: could you please check if GPIOH_3 is correct or if it's
> a "copy-and-paste" issue (Q200 is the only GXL/GXM based board.
> GXL/GXM SoCs have fewer GPIOAO pins than GXBB, so the interrupt
> offset for the same non-GPIOAO pin is different than on GXBB)

Good catch, I confirm that the interrupt in GPIOZ_15 and certainly not GPIOH_3

> 
> compile-tested: all boards
> runtime tested: Khadas VIM2 (unplugging / plugging the Ethernet
> cable increases the interrupt counter in /proc/interrupts and the
> kernel correctly reports that the cable has been {un,}plugged)
> 
> 
> Martin Blumenstingl (2):
>   ARM64: dts: meson: add comments with the GPIO for the PHY interrupts
>   ARM64: dts: meson-gxm: add the PHY interrupt line on Khadas VIM2
> 
>  arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts  | 1 +
>  arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts   | 2 ++
>  arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts       | 1 +
>  arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 3 +++
>  arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts        | 1 +
>  5 files changed, 8 insertions(+)
> 

[PATCH 0/2] Ethernet PHY interrupt improvements

[Kevin Hilman]

Jerome Brunet <jbrunet@baylibre.com> writes:

> On Sat, 2017-12-02 at 22:40 +0100, Martin Blumenstingl wrote:
>> this small series consists of two patches:
>> #1 documents the GPIO to which the PHY's interrupt line is connected
>>    (the name "MAC_INTR" is used in the schematics of Odroid-C2 and
>>     Khadas VIM2)
>> #2 adds the RTL8211F PHY's interrupt line on Khadas VIM2
>> 
>> I was a bit surprised to see that the GXM Q200 board seems to use
>> GPIOH_3 instead of GPIOZ_15 like all other boards.
>> @Jerome: could you please check if GPIOH_3 is correct or if it's
>> a "copy-and-paste" issue (Q200 is the only GXL/GXM based board.
>> GXL/GXM SoCs have fewer GPIOAO pins than GXBB, so the interrupt
>> offset for the same non-GPIOAO pin is different than on GXBB)
>
> Good catch, I confirm that the interrupt in GPIOZ_15 and certainly not GPIOH_3
>

Series applied to v4.16/dt64 with Jerome's review tags.

Thanks,

Kevin