From: "Rob Herring (Arm)" <robh@kernel.org>
To: Xianwei Zhao <xianwei.zhao@amlogic.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>,
linux-clk@vger.kernel.org,
Neil Armstrong <neil.armstrong@linaro.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Chuan Liu <chuan.liu@amlogic.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/5] dt-bindings: clock: add Amlogic A5 SCMI clock controller support
Date: Wed, 18 Sep 2024 11:07:14 -0500 [thread overview]
Message-ID: <172667563318.1699620.6883728767588499798.robh@kernel.org> (raw)
In-Reply-To: <20240914-a5-clk-v1-2-5ee2c4f1b08c@amlogic.com>
On Sat, 14 Sep 2024 13:25:24 +0800, Xianwei Zhao wrote:
> From: Chuan Liu <chuan.liu@amlogic.com>
>
> Add the SCMI clock controller dt-bindings for Amlogic A5 SoC family.
>
> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
> ---
> include/dt-bindings/clock/amlogic,a5-scmi-clkc.h | 37 ++++++++++++++++++++++++
> 1 file changed, 37 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
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next prev parent reply other threads:[~2024-09-18 16:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-14 5:25 [PATCH 0/5] Add A5 SoC PLLs and Peripheral clock Xianwei Zhao via B4 Relay
2024-09-14 5:25 ` [PATCH 1/5] dt-bindings: clock: add Amlogic A5 PLL clock controller Xianwei Zhao via B4 Relay
2024-09-18 16:06 ` Rob Herring (Arm)
2024-09-14 5:25 ` [PATCH 2/5] dt-bindings: clock: add Amlogic A5 SCMI clock controller support Xianwei Zhao via B4 Relay
2024-09-18 16:07 ` Rob Herring (Arm) [this message]
2024-09-14 5:25 ` [PATCH 3/5] dt-bindings: clock: add Amlogic A5 peripherals clock controller Xianwei Zhao via B4 Relay
2024-09-18 16:13 ` Rob Herring (Arm)
2024-09-14 5:25 ` [PATCH 4/5] clk: meson: add support for the A5 SoC PLL clock Xianwei Zhao via B4 Relay
2024-09-24 14:45 ` Jerome Brunet
2024-09-29 8:17 ` Xianwei Zhao
2024-09-30 9:41 ` Jerome Brunet
2024-10-12 5:43 ` Xianwei Zhao
2024-09-14 5:25 ` [PATCH 5/5] clk: meson: add A5 clock peripherals controller driver Xianwei Zhao via B4 Relay
2024-09-24 15:09 ` Jerome Brunet
2024-09-29 8:44 ` Xianwei Zhao
2024-09-30 10:16 ` Jerome Brunet
2024-10-12 5:50 ` Xianwei Zhao
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