From: jbrunet@baylibre.com (jbrunet at baylibre.com)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH 3/3] clk: meson: clk-pll: drop hard-coded rates from pll tables
Date: Thu, 26 Jul 2018 10:48:12 +0200 [thread overview]
Message-ID: <190f2749c6e65fddcd2fd17ebdb45be5a434b869.camel@baylibre.com> (raw)
In-Reply-To: <CAFBinCD3i5pRzSp4Sx5349p_2XQfdCNguxU-gU1tD_asFu6YjA@mail.gmail.com>
On Sat, 2018-07-21 at 23:34 +0200, Martin Blumenstingl wrote:
> On Sat, Jul 21, 2018 at 10:46 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
> >
> > On Sat, 2018-07-21 at 22:16 +0200, Martin Blumenstingl wrote:
> > > > We could even add ranges instead of table when we know the PLL supports a well-known continuous dividers range.
> > >
> > > I had a look at the sys_pll settings on Meson8b, here's what
> > > Meson8/Meson8b/Meson8m2 support for sys_pll:
> > > - 50..74
> > > - 76
> > > - 78
> > > - 80
> > > - 82
> > > - 84
> > > - 86
> > > - 88
> > > - 90
> > > - 92
> > > - 94
> > > - 96
> > > - 98
> >
> > Are those values with the same predivider (n) value ?
>
> yes, all are using n = 1
The table proposed in this patch keeps things the way they were before the
change. We could extend the table with these values in a follow up patch.
If those value are with n=1, then I would guess that odd values from 75 to 97
work as well.
next prev parent reply other threads:[~2018-07-26 8:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-17 9:56 [PATCH 0/3] clk: meson: clk-pll driver update Jerome Brunet
2018-07-17 9:56 ` [PATCH 1/3] clk: meson: clk-pll: add enable bit Jerome Brunet
2018-07-19 8:33 ` Neil Armstrong
2018-07-21 19:48 ` Martin Blumenstingl
2018-07-21 20:26 ` Jerome Brunet
2018-07-17 9:56 ` [PATCH 2/3] clk: meson: clk-pll: remove od parameters Jerome Brunet
2018-07-19 8:42 ` Neil Armstrong
2018-07-19 8:45 ` Jerome Brunet
2018-07-21 20:01 ` Martin Blumenstingl
2018-07-21 20:42 ` Jerome Brunet
2018-07-21 21:37 ` Martin Blumenstingl
2018-07-17 9:56 ` [PATCH 3/3] clk: meson: clk-pll: drop hard-coded rates from pll tables Jerome Brunet
2018-07-19 8:44 ` Neil Armstrong
2018-07-19 8:59 ` Jerome Brunet
2018-07-21 20:16 ` Martin Blumenstingl
2018-07-21 20:46 ` Jerome Brunet
2018-07-21 21:34 ` Martin Blumenstingl
2018-07-26 8:48 ` jbrunet at baylibre.com [this message]
2018-07-21 20:17 ` [PATCH 0/3] clk: meson: clk-pll driver update Martin Blumenstingl
2018-07-21 20:48 ` Jerome Brunet
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