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[82.65.169.74]) by smtp.gmail.com with ESMTPSA id j8sm3868701wrx.11.2020.12.04.06.24.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Dec 2020 06:24:10 -0800 (PST) References: User-agent: mu4e 1.4.10; emacs 27.1 From: Jerome Brunet To: Linus Walleij , =?utf-8?B?5p6X5Zyj5qyi?= Subject: Re: 0001-add-amlogic-gpio-to-irq In-reply-to: Message-ID: <1jeek5ps3b.fsf@starbuckisacylon.baylibre.com> Date: Fri, 04 Dec 2020 15:24:09 +0100 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201204_092414_486706_0F43CA7D X-CRM114-Status: GOOD ( 14.41 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: narmstrong , "martin.blumenstingl" , khilman , linux-kernel , linux-gpio , linux-amlogic , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Fri 04 Dec 2020 at 10:13, Linus Walleij wrote: > Hi Lisheng, > > this patch got a bit mangled but I get where you're going. > > I think Meson needs to be augmented to use hierarchical gpiolib irqchip > because this seems to be what the system is doing. > > So start with drivers/pinctrl/meson/Kconfig and add: > > select GPIOLIB_IRQCHIP > select IRQ_DOMAIN_HIEARARCHY > > Then use the generic hierarchical gpiolib irqchip as described > in Documentation/driver-api/gpio/driver.rst > Type > git grep child_to_parent_hwirq > for several examples of how to do this. One reason the irqchip has not been linked to the gpio controller so far is IRQ_EDGE_BOTH which the irqchip does not support (expect for the latest sm1 family) This is a problem we discussed a couple of years ago. This HW only has 8 irqs that can each be mapped to a pin. No direct translation can be made, we have to allocate an irq to monitor the line. So when gpio_to_irq() was called, we had to do that allocation dynamically to return a valid irq number. Since there was no counter part to gpio_to_irq(), those allocation cannot be freed during the lifetime of the device. When drivers relying IRQ_EDGE_BOTH first try the `gpio_to_irq()`, allocating the irq works but setting the type does not. We are then left with unused allocated irqs (and we don't have much) Frameworks using gpio_to_irq() are often capable() of parsing interrupt properties directly too. So far, it was enough to work around the problem. I admit, I have not been following gpiolib closely since then, maybe some progress have been made > > Yours, > Linus Walleij _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic