From: yixun.lan@amlogic.com (Yixun Lan)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH 2/2] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC
Date: Mon, 6 Nov 2017 15:32:04 +0800 [thread overview]
Message-ID: <20171106073204.14548-1-yixun.lan@amlogic.com> (raw)
From: Qiufang Dai <qiufang.dai@amlogic.com>
Try to add Hiubus DT info, and also enable clock DT info
for the Amlogic's Meson-AXG SoC.
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 003832890d2b..4a07fc7daa99 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -7,6 +7,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/axg-clkc.h>
+#include <dt-bindings/clock/gxbb-aoclkc.h>
/ {
compatible = "amlogic,meson-axg";
@@ -148,6 +150,20 @@
#address-cells = <0>;
};
+ hiubus: hiubus at ff63c000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xff63c000 0x0 0x1c00>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
+
+ clkc: clock-controller at 0 {
+ compatible = "amlogic,axg-clkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x0 0x0 0x320>;
+ };
+ };
+
mailbox: mailbox at ff63dc00 {
compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
reg = <0 0xff63dc00 0 0x400>;
--
2.14.1
reply other threads:[~2017-11-06 7:32 UTC|newest]
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