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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id w3sm3779500otg.24.2020.05.12.15.44.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 15:44:18 -0700 (PDT) Received: (nullmailer pid 11405 invoked by uid 1000); Tue, 12 May 2020 22:44:17 -0000 Date: Tue, 12 May 2020 17:44:17 -0500 From: Rob Herring To: Martin Blumenstingl Subject: Re: [PATCH v7 1/2] dt-bindings: mmc: Document the Amlogic Meson SDHC MMC host controller Message-ID: <20200512224417.GA11220@bogus> References: <20200512204147.504087-1-martin.blumenstingl@googlemail.com> <20200512204147.504087-2-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200512204147.504087-2-martin.blumenstingl@googlemail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200512_154419_786778_411835C5 X-CRM114-Status: GOOD ( 10.06 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, ulf.hansson@linaro.org, jianxin.pan@amlogic.com, linux.amoon@gmail.com, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, yinxin_1989@aliyun.com, robh+dt@kernel.org, linux-amlogic@lists.infradead.org, lnykww@gmail.com, linux-arm-kernel@lists.infradead.org, jbrunet@baylibre.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Tue, 12 May 2020 22:41:46 +0200, Martin Blumenstingl wrote: > This documents the devicetree bindings for the SDHC MMC host controller > found in Meson6, Meson8, Meson8b and Meson8m2 SoCs. It can use a > bus-width of 1/4/8-bit and it supports eMMC spec 4.4x/4.5x including > HS200 mode (up to 100MHz clock). It embeds an internal clock controller > which outputs four clocks (mod_clk, sd_clk, tx_clk and rx_clk) and is > fed by four external input clocks (clkin[0-3]). "pclk" is the module > register clock, it has to be enabled to access the registers. > > Signed-off-by: Martin Blumenstingl > --- > .../bindings/mmc/amlogic,meson-mx-sdhc.yaml | 68 +++++++++++++++++++ > 1 file changed, 68 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml > Reviewed-by: Rob Herring _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic