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([2001:861:44c0:66c0:381b:6e50:a892:5269]) by smtp.gmail.com with ESMTPSA id i8sm14694212wry.108.2022.01.12.00.19.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Jan 2022 00:19:35 -0800 (PST) Subject: Re: [PATCH 6/6] drm/meson: add support for MIPI-DSI transceiver To: Jagan Teki Cc: daniel@ffwll.ch, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org References: <20200907081825.1654-1-narmstrong@baylibre.com> <20200907081825.1654-7-narmstrong@baylibre.com> From: Neil Armstrong Organization: Baylibre Message-ID: <70d1af3f-bc00-4afd-1157-1cf70d3b2c88@baylibre.com> Date: Wed, 12 Jan 2022 09:19:35 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220112_001943_559884_7AB493F7 X-CRM114-Status: GOOD ( 20.42 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi, On 12/01/2022 08:24, Jagan Teki wrote: > Hi Neil, > > On Mon, Sep 7, 2020 at 1:48 PM Neil Armstrong wrote: >> >> The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a), with a custom >> glue managing the IP resets, clock and data input similar to the DW-HDMI Glue on other >> Amlogic SoCs. >> >> This adds support for the Glue managing the transceiver, mimicing the init flow provided >> by Amlogic to setup the ENCl encoder, the glue, the transceiver, the digital D-PHY and the >> Analog PHY in the proper way. >> >> The DW-MIPI-DSI transceiver + D-PHY are directly clocked by the VCLK2 clock, which pixel clock >> is derived and feeds the ENCL encoder and the VIU pixel reader. >> >> An optional "MEAS" clock can be enabled to measure the delay between each vsync feeding the >> DW-MIPI-DSI transceiver. >> >> Signed-off-by: Neil Armstrong >> --- [..] >> + >> +static const struct component_ops meson_dw_mipi_dsi_ops = { >> + .bind = meson_dw_mipi_dsi_bind, >> + .unbind = meson_dw_mipi_dsi_unbind, >> +}; > > Do you thought of non-component based meson DSI like STM DSI? It > require changes from meson drm but just to understand if you have any > such plan. I have no such plans for now, note this serie has been rewritten at [1] but still with based with components. If worth it, the plan is to get it with components and than yes if it's simpler drop components completely. I'll have a look at how ST does Neil [1] https://lore.kernel.org/r/20220107145515.613009-1-narmstrong@baylibre.com > > Thanks, > Jagan. > _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic