From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Da Xue <da@libre.computer>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: meson-g12a: fix bit range for fixed sys and hifi pll
Date: Thu, 21 Aug 2025 22:42:51 +0200 [thread overview]
Message-ID: <CAFBinCA2XZfiY2ESDSp2WyM9r-XB_LSj9s91woU9iWoQKrp6QA@mail.gmail.com> (raw)
In-Reply-To: <20250814200953.1969944-1-da@libre.computer>
On Thu, Aug 14, 2025 at 10:09 PM Da Xue <da@libre.computer> wrote:
>
> The bit range 17:0 does not match the datasheet for A311D / S905D3.
> Change the bit range to 19:0 for FIX and HIFI PLLs to match datasheet.
I have:
- S905X3_Public_Datasheet_Hardkernel.pdf
- S922X_Datasheet_Wesion.pdf
- A311D_Datasheet_01_Wesion.pdf
These state (for all three PLLs) that .frac is [18:0] (that's shift =
0 and width = 19).
I get where you're coming from with 19:0 - in the context of this
patch this can be misleading as it would mean that the fractional
divider is 20 bits wide.
> There's no frac for sys pll so add that as well.
I first read this as sys pll does not have a fractional divider.
What do you think about: "The frac field for sys pll is missing so add
that as well"
I guess at this point this should include:
Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
> Signed-off-by: Da Xue <da@libre.computer>
[...]
Have you compared /sys/kernel/debug/meson-clk-msr/measure_summary and
/sys/kernel/debug/clk/clk_summary before/after this patch?
I'll test this during the weekend and then give my Tested/Reviewed by
Best regards,
Martin
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next prev parent reply other threads:[~2025-08-22 3:19 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-14 20:09 [PATCH] clk: meson-g12a: fix bit range for fixed sys and hifi pll Da Xue
2025-08-21 20:42 ` Martin Blumenstingl [this message]
2025-08-21 22:21 ` Da Xue
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