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([2a01:e0a:cad:2140:e481:a79a:a1d8:3ad2]) by smtp.gmail.com with ESMTPSA id s3-20020adfe003000000b0034e8a10039esm177867wrh.10.2024.05.03.01.42.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 May 2024 01:42:40 -0700 (PDT) Message-ID: Date: Fri, 3 May 2024 10:42:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Subject: Re: [PATCH 1/2] drm/meson: dw-hdmi: power up phy on device init To: Jerome Brunet , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter Cc: Kevin Hilman , Martin Blumenstingl , dri-devel@lists.freedesktop.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org References: <20240426160256.3089978-1-jbrunet@baylibre.com> <20240426160256.3089978-2-jbrunet@baylibre.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <20240426160256.3089978-2-jbrunet@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240503_014243_582439_C61B4209 X-CRM114-Status: GOOD ( 21.29 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: neil.armstrong@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On 26/04/2024 18:02, Jerome Brunet wrote: > The phy is not in a useful state right after init. It will become useful, > including for auxiliary function such as CEC or ARC, after the first mode > is set. This is a problem on systems where the display is using another > interface like DSI or CVBS. > > This change refactor the init and mode change callback to power up the PHY > on init and leave only what is necessary for mode changes in the related > function. This is enough to fix CEC operation when HDMI display is not > enabled. > > Fixes: 3f68be7d8e96 ("drm/meson: Add support for HDMI encoder and DW-HDMI bridge + PHY") > Signed-off-by: Jerome Brunet > --- > drivers/gpu/drm/meson/meson_dw_hdmi.c | 51 +++++++++------------------ > 1 file changed, 17 insertions(+), 34 deletions(-) > > diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c > index 5a9538bc0e26..a83d93078537 100644 > --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c > +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c > @@ -384,26 +384,6 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, > dw_hdmi_bus_fmt_is_420(hdmi)) > mode_is_420 = true; > > - /* Enable clocks */ > - regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); > - > - /* Bring HDMITX MEM output of power down */ > - regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0); > - > - /* Bring out of reset */ > - dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_SW_RESET, 0); > - > - /* Enable internal pixclk, tmds_clk, spdif_clk, i2s_clk, cecclk */ > - dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL, > - 0x3, 0x3); > - > - /* Enable cec_clk and hdcp22_tmdsclk_en */ > - dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL, > - 0x3 << 4, 0x3 << 4); > - > - /* Enable normal output to PHY */ > - dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); > - > /* TMDS pattern setup */ > if (mode->clock > 340000 && !mode_is_420) { > dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, > @@ -425,20 +405,6 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, > /* Setup PHY parameters */ > meson_hdmi_phy_setup_mode(dw_hdmi, mode, mode_is_420); > > - /* Setup PHY */ > - regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, > - 0xffff << 16, 0x0390 << 16); > - > - /* BIT_INVERT */ > - if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") || > - dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi") || > - dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-g12a-dw-hdmi")) > - regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, > - BIT(17), 0); > - else > - regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, > - BIT(17), BIT(17)); > - > /* Disable clock, fifo, fifo_wr */ > regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0); > > @@ -656,6 +622,23 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi) > meson_dw_hdmi->data->top_write(meson_dw_hdmi, > HDMITX_TOP_CLK_CNTL, 0xff); > > + /* Enable normal output to PHY */ > + meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); > + > + /* Setup PHY */ > + regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, > + 0xffff << 16, 0x0390 << 16); > + > + /* BIT_INVERT */ > + if (dw_hdmi_is_compatible(meson_dw_hdmi, "amlogic,meson-gxl-dw-hdmi") || > + dw_hdmi_is_compatible(meson_dw_hdmi, "amlogic,meson-gxm-dw-hdmi") || > + dw_hdmi_is_compatible(meson_dw_hdmi, "amlogic,meson-g12a-dw-hdmi")) > + regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, > + BIT(17), 0); > + else > + regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, > + BIT(17), BIT(17)); > + > /* Enable HDMI-TX Interrupt */ > meson_dw_hdmi->data->top_write(meson_dw_hdmi, HDMITX_TOP_INTR_STAT_CLR, > HDMITX_TOP_INTR_CORE); Reviewed-by: Neil Armstrong _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic