Re: [PATCH] pwm: meson: compute cnt register value in proper way

[Heiner Kallweit <hkallweit1@gmail.com>]

On 02.06.2023 12:32, George Stark wrote:
> According to the datasheet, the PWM high and low clock count values
> should be set to at least one. Therefore, setting the clock count
> register to 0 actually means 1 clock count.
> 
> Signed-off-by: George Stark <GNStark@sberdevices.ru>
> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
> ---
> This patch is based on currently unmerged patch by Heiner Kallweit
> https://lore.kernel.org/linux-amlogic/23fe625e-dc23-4db8-3dce-83167cd3b206@gmail.com
> ---
> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
> index 834acd7..57e7d9c 100644
> --- a/drivers/pwm/pwm-meson.c
> +++ b/drivers/pwm/pwm-meson.c
> @@ -206,6 +206,11 @@
>  		channel->pre_div = pre_div;
>  		channel->hi = duty_cnt;
>  		channel->lo = cnt - duty_cnt;
> +
> +		if (channel->hi)
> +			channel->hi--;
> +		if (channel->lo)
> +			channel->lo--;

I'm not sure whether we should do this. duty_cnt and cnt are results
of an integer division and therefore potentially rounded down.
The chip-internal increment may help to compensate such rounding
errors, so to say. With the proposed change we may end up with the
effective period being shorter than the requested one.
And IIRC this should not happen.

>  	}
>  
>  	return 0;
> @@ -340,7 +345,8 @@
>  	channel->lo = FIELD_GET(PWM_LOW_MASK, value);
>  	channel->hi = FIELD_GET(PWM_HIGH_MASK, value);
>  
> -	state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->lo + channel->hi);
> +	state->period = meson_pwm_cnt_to_ns(chip, pwm,
> +					    channel->lo + 1 + channel->hi + 1);
>  	state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);
>  
Doesn't channel->hi have to be incremented here too?

>  	return 0;


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