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From: Neil Armstrong <neil.armstrong@linaro.org>
To: xianwei.zhao@amlogic.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Kevin Hilman <khilman@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Bartosz Golaszewski <brgl@bgdev.pl>
Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 1/5] dt-bindings: pinctrl: modify gpio-cells property
Date: Tue, 12 Nov 2024 14:26:47 +0100	[thread overview]
Message-ID: <e1b810f6-b5b3-43aa-9cc1-e9601589ddf5@linaro.org> (raw)
In-Reply-To: <20241112-a4_pinctrl-v5-1-3460ce10c480@amlogic.com>

Hi,

On 12/11/2024 11:26, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao@amlogic.com>
> 
> Extend the value range of #gpio-cells property, including [2, 3],
> to compatible with Amlogic A4 SoC and later chips's pinctrl module.
> The early GPIO parameter number is 2, and the later GPIO parameter
> number is 3.
> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
> ---
>   .../devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml       | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml
> index e707c222a07f..6b53577dea59 100644
> --- a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml
> @@ -36,7 +36,7 @@ $defs:
>         gpio-controller: true
>   
>         "#gpio-cells":
> -        const: 2
> +        enum: [2, 3]
>   
>         gpio-ranges:
>           maxItems: 1
> 

This is not what I expected, this allows 3 cells for all Amlogic pinctrl,
which is wrong.

Instead, remove "#gpio-cells" definition from amlogic,meson-pinctrl-common.yaml
and add them in all amlogic,meson-pinctrl-XXX.yaml with const: 2, and then when you
introduce A4/A5, add a new amlogic,meson-pinctrl-a5.yaml with const: 3.

Neil

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  reply	other threads:[~2024-11-12 13:32 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-12 10:26 [PATCH v5 0/5] Pinctrl: A4: Add pinctrl driver Xianwei Zhao via B4 Relay
2024-11-12 10:26 ` [PATCH v5 1/5] dt-bindings: pinctrl: modify gpio-cells property Xianwei Zhao via B4 Relay
2024-11-12 13:26   ` Neil Armstrong [this message]
2024-11-13  2:23     ` Xianwei Zhao
2024-11-12 10:26 ` [PATCH v5 2/5] dt-bindings: pinctrl: Add support for Amlogic A4 SoCs Xianwei Zhao via B4 Relay
2024-11-12 10:26 ` [PATCH v5 3/5] pinctrl: meson: add interface of of_xlate Xianwei Zhao via B4 Relay
2024-11-12 13:28   ` Neil Armstrong
2024-11-12 10:26 ` [PATCH v5 4/5] pinctrl: meson: Add driver support for Amlogic A4 SoCs Xianwei Zhao via B4 Relay
2024-11-12 13:33   ` Neil Armstrong
2024-11-12 10:26 ` [PATCH v5 5/5] arm64: dts: amlogic: a4: add pinctrl node Xianwei Zhao via B4 Relay
2024-11-12 13:34   ` Neil Armstrong

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