From: Vishal Verma <vishal.l.verma@linux.intel.com>
To: Christoph Hellwig <hch@lst.de>
Cc: Dan Williams <dan.j.williams@intel.com>,
axboe@kernel.dk, sfr@canb.auug.org.au, rafael@kernel.org,
neilb@suse.de, gregkh@linuxfoundation.org,
linux-nvdimm@lists.01.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-api@vger.kernel.org,
akpm@linux-foundation.org, mingo@kernel.org
Subject: Re: [PATCH v5 18/21] nd_btt: atomic sector updates
Date: Tue, 09 Jun 2015 12:27:11 -0600 [thread overview]
Message-ID: <1433874431.32607.37.camel@linux.intel.com> (raw)
In-Reply-To: <20150609064425.GF9804@lst.de>
On Tue, 2015-06-09 at 08:44 +0200, Christoph Hellwig wrote:
> I really want to see a good explanation why this is not a blk-mq driver
> given that it does fairly substantial work and has synchronization
> in its make_request function.
The biggest reason, I think, is that the BTT (just like pmem, brd etc),
does all its IOs synchronously. There isn't any queuing being done by
the device.
There are three places where we do synchronization in the BTT. Two of
them - map locks, and lanes are intrinsic to the BTT algorithm, so the
one you referred to must be the 'RTT' (the path that stalls writes if
the free block they picked to write to is being read from). My reasoning
is that since we're talking about DRAM-like speeds, and the reader(s)
will be reading at most one LBA, the wait for the writer is really
bounded, and queuing and switching to a different IO on a CPU seems more
expensive than just waiting out the readers.
Even for the lane locks, we did a comparison between two lane lock
strategies - first where we kept an atomic counter around that tracked
which was the last lane that was used, and 'our' lane was determined by
atomically incrementing that. That way, if there are more CPUs than
lanes available, theoretically, no CPU would be blocked waiting for a
lane. The other strategy was to use the cpu number we're scheduled on to
and hash it to a lane number. Theoretically, this could block an IO that
could've otherwise run using a different, free lane. But some fio
workloads showed that the direct cpu -> lane hash performed faster than
tracking 'last lane' - my reasoning is the cache thrash caused by moving
the atomic variable made that approach slower than simply waiting out
the in-progress IO. Wouldn't adding to a queue be even more overhead
than a bit of cache thrash on a single variable?
The devices being synchronous, there is also no question of async
completions that might need to be handled - so I don't really see any
benefits that request queues might get us. Allow me to turn the question
around, and ask what will blk-mq get us?
Thanks,
-Vishal
next prev parent reply other threads:[~2015-06-09 18:27 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-02 0:14 [PATCH v5 00/21] libnvdimm: non-volatile memory devices Dan Williams
2015-06-02 0:14 ` [PATCH v5 01/21] e820, efi: add ACPI 6.0 persistent memory types Dan Williams
2015-06-02 0:14 ` [PATCH v5 02/21] libnvdimm, nfit: initial libnvdimm infrastructure and NFIT support Dan Williams
2015-06-03 14:57 ` Christoph Hellwig
[not found] ` <20150603145704.GA22311-jcswGhMUV9g@public.gmane.org>
2015-06-03 19:24 ` Williams, Dan J
[not found] ` <1433359473.21035.27.camel-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-06-09 6:33 ` hch-jcswGhMUV9g
2015-06-09 22:27 ` Dan Williams
2015-06-02 0:14 ` [PATCH v5 03/21] libnvdimm: control character device and libnvdimm bus sysfs attributes Dan Williams
2015-06-02 0:14 ` [PATCH v5 04/21] libnvdimm, nfit: dimm/memory-devices Dan Williams
2015-06-02 0:14 ` [PATCH v5 05/21] libnvdimm: control (ioctl) messages for libnvdimm bus and dimm devices Dan Williams
[not found] ` <20150602001435.4506.42614.stgit-p8uTFz9XbKj2zm6wflaqv1nYeNYlB/vhral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-06-09 6:34 ` Christoph Hellwig
[not found] ` <20150609063418.GB9804-jcswGhMUV9g@public.gmane.org>
2015-06-09 6:57 ` Dan Williams
[not found] ` <CAPcyv4jmHpg4YrseBWH-k=achv4N-V8n2X0CkFw+-AFsiRuH8A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-06-10 7:33 ` Christoph Hellwig
2015-06-02 0:14 ` [PATCH v5 07/21] libnvdimm, nfit: regions (block-data-window, persistent memory, volatile memory) Dan Williams
2015-06-02 0:14 ` [PATCH v5 08/21] libnvdimm: support for legacy (non-aliasing) nvdimms Dan Williams
2015-06-02 0:14 ` [PATCH v5 09/21] libnvdimm, nd_pmem: add libnvdimm support to the pmem driver Dan Williams
2015-06-03 7:44 ` Christoph Hellwig
[not found] ` <20150603074424.GA24949-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
2015-06-03 19:31 ` Williams, Dan J
[not found] ` <1433359894.21035.33.camel-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-06-09 6:36 ` hch-jcswGhMUV9g
2015-06-02 0:15 ` [PATCH v5 10/21] pmem: Dynamically allocate partition numbers Dan Williams
2015-06-02 0:15 ` [PATCH v5 11/21] libnvdimm, nfit: add interleave-set state-tracking infrastructure Dan Williams
2015-06-02 0:15 ` [PATCH v5 12/21] libnvdimm: namespace indices: read and validate Dan Williams
[not found] ` <20150602001514.4506.13974.stgit-p8uTFz9XbKj2zm6wflaqv1nYeNYlB/vhral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-06-09 6:39 ` Christoph Hellwig
2015-06-10 15:54 ` Dan Williams
2015-06-02 0:15 ` [PATCH v5 14/21] libnvdimm: blk labels and namespace instantiation Dan Williams
2015-06-02 0:15 ` [PATCH v5 17/21] libnvdimm: infrastructure for btt devices Dan Williams
2015-06-09 6:42 ` Christoph Hellwig
2015-06-10 18:46 ` Matthew Wilcox
2015-06-11 7:28 ` Christoph Hellwig
[not found] ` <20150611072812.GB1905-jcswGhMUV9g@public.gmane.org>
2015-06-17 16:47 ` Jeff Moyer
[not found] ` <x49381qp9ic.fsf-RRHT56Q3PSP4kTEheFKJxxDDeQx5vsVwAInAS/Ez/D0@public.gmane.org>
2015-06-17 16:50 ` Dan Williams
2015-06-17 16:57 ` Jeff Moyer
2015-06-17 17:09 ` Dan Williams
[not found] ` <20150602001134.4506.45867.stgit-p8uTFz9XbKj2zm6wflaqv1nYeNYlB/vhral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-06-02 0:14 ` [PATCH v5 06/21] libnvdimm, nvdimm: dimm driver and base libnvdimm device-driver infrastructure Dan Williams
2015-06-02 0:15 ` [PATCH v5 13/21] libnvdimm: pmem label sets and namespace instantiation Dan Williams
2015-06-02 0:15 ` [PATCH v5 15/21] libnvdimm: write pmem label set Dan Williams
2015-06-02 0:15 ` [PATCH v5 16/21] libnvdimm: write blk " Dan Williams
2015-06-02 0:15 ` [PATCH v5 18/21] nd_btt: atomic sector updates Dan Williams
[not found] ` <20150602001546.4506.15713.stgit-p8uTFz9XbKj2zm6wflaqv1nYeNYlB/vhral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-06-09 6:44 ` Christoph Hellwig
2015-06-09 18:27 ` Vishal Verma [this message]
[not found] ` <1433874431.32607.37.camel-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2015-06-10 7:34 ` Christoph Hellwig
2015-06-10 18:24 ` Vishal Verma
2015-06-02 0:15 ` [PATCH v5 19/21] libnvdimm, nfit, nd_blk: driver for BLK-mode access persistent memory Dan Williams
2015-06-02 0:15 ` [PATCH v5 20/21] tools/testing/nvdimm: manufactured NFITs for interface development Dan Williams
[not found] ` <20150602001557.4506.57136.stgit-p8uTFz9XbKj2zm6wflaqv1nYeNYlB/vhral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-06-09 6:48 ` Christoph Hellwig
2015-06-11 20:12 ` Dan Williams
2015-06-02 0:16 ` [PATCH v5 21/21] libnvdimm: Non-Volatile Devices Dan Williams
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