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From: David Daney <ddaney.cavm@gmail.com>
To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Rafał Miłecki" <zajec5@gmail.com>,
	linux-api@vger.kernel.org,
	"Sean O. Stalley" <sean.stalley@intel.com>,
	yinghai@kernel.org, rajatxjain@gmail.com,
	gong.chen@linux.intel.com
Cc: David Daney <david.daney@cavium.com>
Subject: [PATCH v6 5/5] PCI: Handle Enhanced Allocation (EA) capability for SRIOV devices.
Date: Tue, 20 Oct 2015 16:04:42 -0700	[thread overview]
Message-ID: <1445382282-2396-6-git-send-email-ddaney.cavm@gmail.com> (raw)
In-Reply-To: <1445382282-2396-1-git-send-email-ddaney.cavm@gmail.com>

From: David Daney <david.daney@cavium.com>

SRIOV BARs can be specified via EA entries.  Extend the EA parser to
extract the SRIOV BAR resources, and modify sriov_init() to use
resources previously obtained via EA.

Acked-by: Sean O. Stalley <sean.stalley@intel.com>
Signed-off-by: David Daney <david.daney@cavium.com>
---
 drivers/pci/iov.c | 11 +++++++++--
 drivers/pci/pci.c |  6 ++++++
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index ee0ebff..c789e68 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -436,8 +436,15 @@ found:
 	nres = 0;
 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
 		res = &dev->resource[i + PCI_IOV_RESOURCES];
-		bar64 = __pci_read_base(dev, pci_bar_unknown, res,
-					pos + PCI_SRIOV_BAR + i * 4);
+		/*
+		 * If it is already FIXED, don't change it, something
+		 * (perhaps EA or header fixups) wants it this way.
+		 */
+		if (res->flags & IORESOURCE_PCI_FIXED)
+			bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
+		else
+			bar64 = __pci_read_base(dev, pci_bar_unknown, res,
+						pos + PCI_SRIOV_BAR + i * 4);
 		if (!res->flags)
 			continue;
 		if (resource_size(res) & (PAGE_SIZE - 1)) {
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index f1f6308..c048d69 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2176,6 +2176,12 @@ static struct resource *pci_ea_get_resource(struct pci_dev *dev, u8 bei,
 {
 	if (bei <= PCI_EA_BEI_BAR5 && prop <= PCI_EA_P_IO)
 		return &dev->resource[bei];
+#ifdef CONFIG_PCI_IOV
+	else if (bei >= PCI_EA_BEI_VF_BAR0 && bei <= PCI_EA_BEI_VF_BAR5 &&
+		 (prop == PCI_EA_P_VF_MEM || prop == PCI_EA_P_VF_MEM_PREFETCH))
+		return &dev->resource[PCI_IOV_RESOURCES +
+				      bei - PCI_EA_BEI_VF_BAR0];
+#endif
 	else if (bei == PCI_EA_BEI_ROM)
 		return &dev->resource[PCI_ROM_RESOURCE];
 	else
-- 
1.9.1

  parent reply	other threads:[~2015-10-20 23:04 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-20 23:04 [PATCH v6 0/5] PCI: Add support for PCI Enhanced Allocation "BARs" David Daney
2015-10-20 23:04 ` [PATCH v6 1/5] PCI: Handle IORESOURCE_PCI_FIXED when sizing resources David Daney
     [not found]   ` <1445382282-2396-2-git-send-email-ddaney.cavm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-10-29 20:57     ` David Daney
2015-10-29 21:13       ` Bjorn Helgaas
2015-10-20 23:04 ` [PATCH v6 2/5] PCI: Handle IORESOURCE_PCI_FIXED when assigning resources David Daney
2015-10-20 23:04 ` [PATCH v6 3/5] PCI: Add Enhanced Allocation register entries David Daney
     [not found] ` <1445382282-2396-1-git-send-email-ddaney.cavm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-10-20 23:04   ` [PATCH v6 4/5] PCI: Add support for Enhanced Allocation devices David Daney
2015-10-20 23:04 ` David Daney [this message]
2015-10-21 15:14 ` [PATCH v6 0/5] PCI: Add support for PCI Enhanced Allocation "BARs" Bjorn Helgaas
2015-10-21 15:39   ` David Daney
2015-10-21 17:29   ` Sean O. Stalley

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