From: Ingo Molnar <mingo@kernel.org>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Matt Fleming <matt.fleming@intel.com>,
dri-devel@lists.freedesktop.org, David Airlie <airlied@linux.ie>,
intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Sourab Gupta <sourab.gupta@intel.com>,
linux-api@vger.kernel.org, Zheng Yan <zheng.z.yan@intel.com>,
Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [RFC 0/6] Non perf based Gen Graphics OA unit driver
Date: Fri, 16 Oct 2015 12:02:28 +0200 [thread overview]
Message-ID: <20151016100228.GA22732@gmail.com> (raw)
In-Reply-To: <20151016094306.GA3604@twins.programming.kicks-ass.net>
* Peter Zijlstra <peterz@infradead.org> wrote:
> > - We may be making some technical compromises a.t.m for the sake of
> > using perf.
> >
> > perf_event_open() requires events to either relate to a pid or a
> > specific cpu core, while our device pmu relates to neither. Events
> > opened with a pid will be automatically enabled/disabled according
> > to the scheduling of that process - so not appropriate for us.
>
> Right; the traditional cpu/pid mapping doesn't work well for devices;
> but maybe, with some work, we can create something like that
> global/local render context from it; although I've no clue what form
> that would need at this time.
Could someone please help with some very basic questions, such as what the
hardware model of the 'OA' unit model is? How are OA registers set up, how are
their values made accessible to the host side, etc.
I see some references to 'OA' registers in:
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol03-gpu_overview_1.pdf
and I tried to find a more high level description in:
https://01.org/linuxgraphics/documentation/hardware-specification-prms/2014-2015-intel-processors-based-broadwell-platform
but couldn't find it. (Maybe it's my fault!)
Thanks,
Ingo
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next prev parent reply other threads:[~2015-10-16 10:02 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-29 14:39 [RFC 0/6] Non perf based Gen Graphics OA unit driver Robert Bragg
2015-09-29 14:39 ` [RFC 1/6] drm/i915: Add i915 perf infrastructure Robert Bragg
2015-09-29 14:39 ` [RFC 2/6] drm/i915: rename OACONTROL GEN7_OACONTROL Robert Bragg
2015-09-29 14:39 ` [RFC 3/6] drm/i915: Add static '3D' Haswell OA unit config Robert Bragg
2015-09-29 14:39 ` [RFC 4/6] drm/i915: Add i915 perf event for Haswell OA unit Robert Bragg
2015-09-29 14:55 ` [Intel-gfx] " kbuild test robot
2015-09-29 15:18 ` Peter Zijlstra
2015-09-29 23:19 ` [kbuild-all] " Fengguang Wu
2015-09-29 14:39 ` [RFC 6/6] drm/i915: add oa_event_min_timer_exponent sysctl Robert Bragg
2015-09-30 3:23 ` [RFC 0/6] Non perf based Gen Graphics OA unit driver Zhenyu Wang
[not found] ` <1443537549-6905-1-git-send-email-robert-St23OQVBDYPNLxjTenLetw@public.gmane.org>
2015-09-29 14:39 ` [RFC 5/6] drm/i915: Add dev.i915.perf_event_paranoid sysctl option Robert Bragg
2015-09-30 8:30 ` [RFC 0/6] Non perf based Gen Graphics OA unit driver Chris Wilson
2015-09-30 13:36 ` Robert Bragg
2015-10-16 9:43 ` Peter Zijlstra
2015-10-16 10:02 ` Ingo Molnar [this message]
2015-10-16 10:33 ` Peter Zijlstra
[not found] ` <20151016103345.GS3816-ndre7Fmf5hadTX5a5knrm8zTDFooKrT+cvkQGrU6aU0@public.gmane.org>
2015-10-16 12:08 ` Robert Bragg
2015-10-20 20:16 ` Robert Bragg
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