From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
musl@lists.openwall.com, libc-dev@lists.llvm.org,
linux-api@vger.kernel.org
Subject: [PATCH 1/2] powerpc/64s/exception: treat NIA below __end_interrupts as soft-masked
Date: Thu, 11 Jun 2020 18:12:02 +1000 [thread overview]
Message-ID: <20200611081203.995112-2-npiggin@gmail.com> (raw)
In-Reply-To: <20200611081203.995112-1-npiggin@gmail.com>
The scv instruction causes an interrupt which can enter the kernel with
MSR[EE]=1, thus allowing interrupts to hit at any time. These must not
be taken as normal interrupts, because they come from MSR[PR]=0 context,
and yet the kernel stack is not yet set up and r13 is not set to the
PACA).
Treat this as a soft-masked interrupt regardless of the soft masked
state. This does not affect behaviour yet, because currently all
interrupts are taken with MSR[EE]=0.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/kernel/exceptions-64s.S | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index e70ebb5c318c..388e34665b4a 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -508,8 +508,24 @@ DEFINE_FIXED_SYMBOL(\name\()_common_real)
.macro __GEN_COMMON_BODY name
.if IMASK
+ .if ! ISTACK
+ .error "No support for masked interrupt to use custom stack"
+ .endif
+
+ /* If coming from user, skip soft-mask tests. */
+ andi. r10,r12,MSR_PR
+ bne 2f
+
+ /* Kernel code running below __end_interrupts is implicitly
+ * soft-masked */
+ LOAD_HANDLER(r10, __end_interrupts)
+ cmpld r11,r10
+ li r10,IMASK
+ blt- 1f
+
+ /* Test the soft mask state against our interrupt's bit */
lbz r10,PACAIRQSOFTMASK(r13)
- andi. r10,r10,IMASK
+1: andi. r10,r10,IMASK
/* Associate vector numbers with bits in paca->irq_happened */
.if IVEC == 0x500 || IVEC == 0xea0
li r10,PACA_IRQ_EE
@@ -540,7 +556,7 @@ DEFINE_FIXED_SYMBOL(\name\()_common_real)
.if ISTACK
andi. r10,r12,MSR_PR /* See if coming from user */
- mr r10,r1 /* Save r1 */
+2: mr r10,r1 /* Save r1 */
subi r1,r1,INT_FRAME_SIZE /* alloc frame on kernel stack */
beq- 100f
ld r1,PACAKSAVE(r13) /* kernel stack to use */
@@ -2838,7 +2854,8 @@ masked_interrupt:
ld r10,PACA_EXGEN+EX_R10(r13)
ld r11,PACA_EXGEN+EX_R11(r13)
ld r12,PACA_EXGEN+EX_R12(r13)
- /* returns to kernel where r13 must be set up, so don't restore it */
+ ld r13,PACA_EXGEN+EX_R13(r13)
+ /* May return to masked low address where r13 is not set up */
.if \hsrr
HRFI_TO_KERNEL
.else
@@ -2997,6 +3014,10 @@ EXC_COMMON_BEGIN(ppc64_runlatch_on_trampoline)
USE_FIXED_SECTION(virt_trampolines)
/*
+ * All code below __end_interrupts is treated as soft-masked. If
+ * any code runs here with MSR[EE]=1, it must then cope with pending
+ * soft interrupt being raised (i.e., by ensuring it is replayed).
+ *
* The __end_interrupts marker must be past the out-of-line (OOL)
* handlers, so that they are copied to real address 0x100 when running
* a relocatable kernel. This ensures they can be reached from the short
--
2.23.0
next prev parent reply other threads:[~2020-06-11 8:12 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-11 8:12 Linux powerpc new system call instruction and ABI Nicholas Piggin
2020-06-11 8:12 ` Nicholas Piggin [this message]
2020-07-24 13:25 ` [PATCH 1/2] powerpc/64s/exception: treat NIA below __end_interrupts as soft-masked Michael Ellerman
2020-06-11 8:12 ` [PATCH 2/2] powerpc/64s: system call support for scv/rfscv instructions Nicholas Piggin
2020-07-23 6:47 ` Michael Ellerman
2020-07-23 16:48 ` Christophe Leroy
2020-07-24 10:45 ` Michael Ellerman
2020-06-11 21:02 ` Linux powerpc new system call instruction and ABI Segher Boessenkool
2020-06-14 9:26 ` Nicholas Piggin
2021-05-18 23:13 ` Dmitry V. Levin
2021-05-19 2:50 ` Nicholas Piggin
2021-05-19 5:01 ` Nicholas Piggin
2021-05-21 19:40 ` Matheus Castanho
2021-05-21 19:52 ` Florian Weimer
2021-05-21 20:00 ` Matheus Castanho
2021-05-21 20:52 ` Dmitry V. Levin
2021-05-24 12:11 ` Matheus Castanho
2021-05-24 20:33 ` Matheus Castanho
2021-05-19 10:24 ` Dmitry V. Levin
2021-05-19 10:59 ` Nicholas Piggin
2021-05-19 12:39 ` Tulio Magno Quites Machado Filho
2021-05-19 13:26 ` Dmitry V. Levin
2021-05-19 22:51 ` Nicholas Piggin
2021-05-19 23:27 ` Dmitry V. Levin
2021-05-20 2:40 ` Nicholas Piggin
2021-05-20 3:06 ` Dmitry V. Levin
2021-05-20 5:12 ` Nicholas Piggin
2021-05-19 7:33 ` Joakim Tjernlund
2021-05-19 7:55 ` Nicholas Piggin
2021-05-19 8:08 ` Joakim Tjernlund
2021-05-19 8:42 ` Nicholas Piggin
2021-05-19 11:12 ` Nicholas Piggin
2021-05-19 14:38 ` Segher Boessenkool
2021-05-19 15:06 ` Joakim Tjernlund
2021-05-19 15:22 ` Segher Boessenkool
2021-05-19 15:36 ` [musl] " Rich Felker
2021-05-19 18:09 ` Joakim Tjernlund
2021-05-19 23:48 ` [musl] " Rich Felker
2021-05-20 1:06 ` Dmitry V. Levin
2021-05-20 2:45 ` Nicholas Piggin
2021-05-20 2:59 ` Dmitry V. Levin
2021-05-20 7:20 ` Nicholas Piggin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200611081203.995112-2-npiggin@gmail.com \
--to=npiggin@gmail.com \
--cc=libc-dev@lists.llvm.org \
--cc=linux-api@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=musl@lists.openwall.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).