From: Catalin Marinas <catalin.marinas@arm.com>
To: Andrey Konovalov <andreyknvl@google.com>
Cc: Peter Collingbourne <pcc@google.com>,
Evgenii Stepanov <eugenis@google.com>,
Kostya Serebryany <kcc@google.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Dave Martin <Dave.Martin@arm.com>, Will Deacon <will@kernel.org>,
Oleg Nesterov <oleg@redhat.com>,
"Eric W. Biederman" <ebiederm@xmission.com>,
"James E.J. Bottomley" <James.Bottomley@hansenpartnership.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Kevin Brodsky <kevin.brodsky@arm.com>,
linux-api@vger.kernel.org, Helge Deller <deller@gmx.de>,
David Spickett <david.spickett@linaro.org>
Subject: Re: [PATCH v21 2/2] arm64: expose FAR_EL1 tag bits in siginfo
Date: Wed, 13 Jan 2021 15:46:01 +0000 [thread overview]
Message-ID: <20210113154601.GB27045@gaia> (raw)
In-Reply-To: <CAAeHK+xZJqqdcXyzx0G1P76Kfx_wa9XSCSc3mjOnwc3qervY+Q@mail.gmail.com>
On Wed, Jan 13, 2021 at 03:51:42PM +0100, Andrey Konovalov wrote:
> On Fri, Nov 20, 2020 at 9:34 PM Peter Collingbourne <pcc@google.com> wrote:
> > The kernel currently clears the tag bits (i.e. bits 56-63) in the fault
> > address exposed via siginfo.si_addr and sigcontext.fault_address. However,
> > the tag bits may be needed by tools in order to accurately diagnose
> > memory errors, such as HWASan [1] or future tools based on the Memory
> > Tagging Extension (MTE).
> >
> > Expose these bits via the arch_untagged_si_addr mechanism, so that
> > they are only exposed to signal handlers with the SA_EXPOSE_TAGBITS
> > flag set.
> >
> > [1] http://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
> >
> > Signed-off-by: Peter Collingbourne <pcc@google.com>
> > Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
> > Link: https://linux-review.googlesource.com/id/Ia8876bad8c798e0a32df7c2ce1256c4771c81446
[...]
> Not sure if it's expected, but this patch changes the way in-kernel
> MTE faults are reported. The address of any in-kernel fault now gets
> its top byte zeroed out, even though it was set to 0xf. However I
> guess it's related to the fact that MTE always uses pointer tags in
> 0x0_ format.
Is this for _any_ faults or just MTE tag check faults? I tried the
former and seems fine. Do you have a concrete example to make sure I
understand the issue?
--
Catalin
next prev parent reply other threads:[~2021-01-13 15:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-20 20:33 [PATCH v21 1/2] signal: define the SA_EXPOSE_TAGBITS bit in sa_flags Peter Collingbourne
2020-11-20 20:33 ` [PATCH v21 2/2] arm64: expose FAR_EL1 tag bits in siginfo Peter Collingbourne
2020-11-23 18:56 ` Catalin Marinas
2021-01-13 14:51 ` Andrey Konovalov
2021-01-13 15:46 ` Catalin Marinas [this message]
2020-11-20 23:22 ` [PATCH v21 1/2] signal: define the SA_EXPOSE_TAGBITS bit in sa_flags Eric W. Biederman
2020-11-23 11:49 ` Catalin Marinas
2020-11-23 15:53 ` Eric W. Biederman
2020-11-23 15:59 ` Catalin Marinas
2020-11-23 16:17 ` Eric W. Biederman
2020-11-23 16:23 ` Catalin Marinas
2020-11-23 17:30 ` Eric W. Biederman
2020-11-23 18:53 ` Catalin Marinas
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