From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3256C4320A for ; Fri, 20 Aug 2021 18:23:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D52076127C for ; Fri, 20 Aug 2021 18:23:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237848AbhHTSYX (ORCPT ); Fri, 20 Aug 2021 14:24:23 -0400 Received: from mga18.intel.com ([134.134.136.126]:48046 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238711AbhHTSYR (ORCPT ); Fri, 20 Aug 2021 14:24:17 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10082"; a="203964949" X-IronPort-AV: E=Sophos;i="5.84,338,1620716400"; d="scan'208";a="203964949" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Aug 2021 11:23:08 -0700 X-IronPort-AV: E=Sophos;i="5.84,338,1620716400"; d="scan'208";a="523799163" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Aug 2021 11:23:08 -0700 From: Yu-cheng Yu To: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Dave Martin , Weijiang Yang , Pengfei Xu , Haitao Huang , Rick P Edgecombe Cc: Yu-cheng Yu Subject: [PATCH v29 04/10] x86/cet/ibt: Disable IBT for ia32 Date: Fri, 20 Aug 2021 11:22:39 -0700 Message-Id: <20210820182245.1188-5-yu-cheng.yu@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210820182245.1188-1-yu-cheng.yu@intel.com> References: <20210820182245.1188-1-yu-cheng.yu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-api@vger.kernel.org In a signal, a task's IBT status needs to be saved to the signal frame, and later restored in sigreturn. For the purpose, previous versions of the series add a new struct to the signal frame. However, a new signal frame format (or re-using a reserved space) introduces complex compatibility issues. In the discussion (see link below), Andy Lutomirski proposed using a ucontext flag. The approach is clean and eliminates most compatibility issues. However, a legacy IA32 signal frame does not have ucontext and cannot support a uc flag. Thus, - Disable IBT for ia32. - In ia32 sigreturn, verify ibt is disabled. Signed-off-by: Yu-cheng Yu Acked-by: Andy Lutomirski Cc: Cyrill Gorcunov Cc: Florian Weimer Cc: H. Peter Anvin Cc: Kees Cook Link: https://lore.kernel.org/linux-api/f6e61dae-9805-c855-8873-7481ceb7ea79@intel.com/ --- arch/x86/ia32/ia32_signal.c | 7 +++++++ arch/x86/include/asm/elf.h | 13 ++++++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c index 77d0fa90cc19..946039cb3150 100644 --- a/arch/x86/ia32/ia32_signal.c +++ b/arch/x86/ia32/ia32_signal.c @@ -104,6 +104,13 @@ COMPAT_SYSCALL_DEFINE0(sigreturn) struct sigframe_ia32 __user *frame = (struct sigframe_ia32 __user *)(regs->sp-8); sigset_t set; + /* + * Verify legacy sigreturn does not have IBT enabled. + */ +#ifdef CONFIG_X86_IBT + if (current->thread.shstk.ibt) + goto badframe; +#endif if (!access_ok(frame, sizeof(*frame))) goto badframe; if (__get_user(set.sig[0], &frame->sc.oldmask) diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h index 3281a3d01bd2..cf9eeb30c00c 100644 --- a/arch/x86/include/asm/elf.h +++ b/arch/x86/include/asm/elf.h @@ -6,6 +6,7 @@ * ELF register definitions.. */ #include +#include #include #include @@ -403,7 +404,17 @@ struct arch_elf_state { } #define arch_elf_pt_proc(ehdr, phdr, elf, interp, state) (0) -#define arch_check_elf(ehdr, interp, interp_ehdr, state) (0) +static inline int arch_check_elf(void *ehdr, bool interp, + void *interp_ehdr, + struct arch_elf_state *state) +{ + /* + * Disable IBT for ia32 + */ + if (elf_check_arch_ia32((struct elf32_hdr *)ehdr)) + state->gnu_property &= ~GNU_PROPERTY_X86_FEATURE_1_IBT; + return 0; +} /* Do not change the values. See get_align_mask() */ enum align_flags { -- 2.21.0