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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id x27-20020aa7957b000000b0057534fcd895sm5716573pfq.108.2022.12.02.18.29.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Dec 2022 18:29:06 -0800 (PST) Date: Fri, 2 Dec 2022 18:29:05 -0800 From: Kees Cook To: Rick Edgecombe Cc: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , Weijiang Yang , "Kirill A . Shutemov" , John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com, akpm@linux-foundation.org, Andrew.Cooper3@citrix.com, christina.schimpe@intel.com, Yu-cheng Yu , Christoph Hellwig Subject: Re: [PATCH v4 08/39] x86/mm: Remove _PAGE_DIRTY from kernel RO pages Message-ID: <202212021829.6BC87357@keescook> References: <20221203003606.6838-1-rick.p.edgecombe@intel.com> <20221203003606.6838-9-rick.p.edgecombe@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221203003606.6838-9-rick.p.edgecombe@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-api@vger.kernel.org On Fri, Dec 02, 2022 at 04:35:35PM -0800, Rick Edgecombe wrote: > From: Yu-cheng Yu > > New processors that support Shadow Stack regard Write=0,Dirty=1 PTEs as > shadow stack pages. > > In normal cases, it can be helpful to create Write=1 PTEs as also Dirty=1 > if HW dirty tracking is not needed, because if the Dirty bit is not already > set the CPU has to set Dirty=1 when it the memory gets written to. This > creates addiontal work for the CPU. So tradional wisdom was to simply set > the Dirty bit whenever you didn't care about it. However, it was never > really very helpful for read only kernel memory. > > When CR4.CET=1 and IA32_S_CET.SH_STK_EN=1, some instructions can write to > such supervisor memory. The kernel does not set IA32_S_CET.SH_STK_EN, so > avoiding kernel Write=0,Dirty=1 memory is not strictly needed for any > functional reason. But having Write=0,Dirty=1 kernel memory doesn't have > any functional benefit either, so to reduce ambiguity between shadow stack > and regular Write=0 pages, removed Dirty=1 from any kernel Write=0 PTEs. > > Tested-by: Pengfei Xu > Tested-by: John Allen > Signed-off-by: Yu-cheng Yu Reviewed-by: Kees Cook -- Kees Cook