From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53EF123E320; Wed, 2 Jul 2025 10:56:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751453770; cv=none; b=aabF6NMe+/8VjtjC4f3STxr2CpqZsWePP0ww7tewNh1zkvjuI6dY2ikEdafEigwp1vhl0/klumiLk0hUuU2dXWH4SSoiP8UVkkzxFbRhZu3pJqxnF8aW+MQ/tkfmSYBplmEnHad3B8oo11iBt8DatbWjGoz6YZ2A31ata/2r1QM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751453770; c=relaxed/simple; bh=NY1tznOwjMjpvVGq3j5Lfb9np4QZ/i8PgzIEPy6obns=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=deFVGa/YcVcdcV1CD7ruhTXv/AM0XqQmfogyKrxFnW7bnfsFsmGxQYi2y0NBRcr1mZWIv1EvDRGV5d2msIqGCLs+LJ08ZeeIubtRax250qT6RdfAE6UQxIs3HpkA4gFCB214j1j/es22VJ1abVJrrZV6zmYsE+ZHIPagnQcIewI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fBpFpgaI; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fBpFpgaI" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E7DA2C4CEF0; Wed, 2 Jul 2025 10:56:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751453769; bh=NY1tznOwjMjpvVGq3j5Lfb9np4QZ/i8PgzIEPy6obns=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fBpFpgaICxHkH0C5G+xLTRB5Es1CdYjb9nInYcABsCJKzXWMqLgCP7d6kmDrA/b/r I5WbW/gtY2+NMkHLVdJohOONXFO2URcHbcgyjr+nLDwdyQl/8BePwmKoZZjA5URJ+t 3TqcFcKD/Lk6MX1XObasvpJTe5JAtTeNheQ/7XEQ0TsK5DN1xb3CXh5LUV8LuQH1Q8 9H2pycd4VaebOoUH4DC2HEeD/jWl3zg48j2DxiCQPV6NZvBofip8JxWWACnZg6GMp8 gNzTV2k47HIREhNSsOVuZri0xDa25KiSqnn3/mFvmRE2x712QJdOugeBz+WyTLurMJ oxxKvGBiz5KwA== From: Mark Brown Date: Wed, 02 Jul 2025 11:39:08 +0100 Subject: [PATCH v18 3/8] selftests: Provide helper header for shadow stack testing Precedence: bulk X-Mailing-List: linux-api@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250702-clone3-shadow-stack-v18-3-7965d2b694db@kernel.org> References: <20250702-clone3-shadow-stack-v18-0-7965d2b694db@kernel.org> In-Reply-To: <20250702-clone3-shadow-stack-v18-0-7965d2b694db@kernel.org> To: "Rick P. Edgecombe" , Deepak Gupta , Szabolcs Nagy , "H.J. Lu" , Florian Weimer , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Christian Brauner , Shuah Khan Cc: linux-kernel@vger.kernel.org, Catalin Marinas , Will Deacon , jannh@google.com, bsegall@google.com, Andrew Morton , Yury Khrustalev , Wilco Dijkstra , linux-kselftest@vger.kernel.org, linux-api@vger.kernel.org, Mark Brown , Kees Cook , Kees Cook , Shuah Khan X-Mailer: b4 0.15-dev-cff91 X-Developer-Signature: v=1; a=openpgp-sha256; l=4382; i=broonie@kernel.org; h=from:subject:message-id; bh=NY1tznOwjMjpvVGq3j5Lfb9np4QZ/i8PgzIEPy6obns=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBoZRAsEhEQTaL+JLVjAesgNpfBlHZJR+YilvFWP aRZukSvrZKJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaGUQLAAKCRAk1otyXVSH 0ApYB/9/zO9KXoKhQHPRuCaUcOUwKu5ajBBzbsAibi1m+JW1meSXDGWTyw/DDGDlgJYTGk4ZABm KLVm2yOj476Ke92EvHJuFTUuakjaO6nJ6orGa7mtPg9FoCDSP9BG6BacAaoqdI/qb2we6dNHbEs 5OC0rowy78xLfD6xfgkoavYz5PGPIwP62XCwVE+HZlHzRezWgCcMpBvn6jslqStTw2vLJjYvjQo dVuCfofx6CTxzyTtyV4K6iwX2OqVqQgol/3q30nXvJij6jKa6h2p6nNeFFN1cDu/660xbUvvYhB wfKikkJsOZLEGF3qbHAA8tv/bGEn9Z+0cGMQ7DfOF3kgmgal X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB While almost all users of shadow stacks should be relying on the dynamic linker and libc to enable the feature there are several low level test programs where it is useful to enable without any libc support, allowing testing without full system enablement. This low level testing is helpful during bringup of the support itself, and also in enabling coverage by automated testing without needing all system components in the target root filesystems to have enablement. Provide a header with helpers for this purpose, intended for use only by test programs directly exercising shadow stack interfaces. Reviewed-by: Rick Edgecombe Reviewed-by: Kees Cook Tested-by: Kees Cook Acked-by: Shuah Khan Acked-by: Catalin Marinas Signed-off-by: Mark Brown --- tools/testing/selftests/ksft_shstk.h | 98 ++++++++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/tools/testing/selftests/ksft_shstk.h b/tools/testing/selftests/ksft_shstk.h new file mode 100644 index 000000000000..fecf91218ea5 --- /dev/null +++ b/tools/testing/selftests/ksft_shstk.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Helpers for shadow stack enablement, this is intended to only be + * used by low level test programs directly exercising interfaces for + * working with shadow stacks. + * + * Copyright (C) 2024 ARM Ltd. + */ + +#ifndef __KSFT_SHSTK_H +#define __KSFT_SHSTK_H + +#include + +/* This is currently only defined for x86 */ +#ifndef SHADOW_STACK_SET_TOKEN +#define SHADOW_STACK_SET_TOKEN (1ULL << 0) +#endif + +static bool shadow_stack_enabled; + +#ifdef __x86_64__ +#define ARCH_SHSTK_ENABLE 0x5001 +#define ARCH_SHSTK_SHSTK (1ULL << 0) + +#define ARCH_PRCTL(arg1, arg2) \ +({ \ + long _ret; \ + register long _num asm("eax") = __NR_arch_prctl; \ + register long _arg1 asm("rdi") = (long)(arg1); \ + register long _arg2 asm("rsi") = (long)(arg2); \ + \ + asm volatile ( \ + "syscall\n" \ + : "=a"(_ret) \ + : "r"(_arg1), "r"(_arg2), \ + "0"(_num) \ + : "rcx", "r11", "memory", "cc" \ + ); \ + _ret; \ +}) + +#define ENABLE_SHADOW_STACK +static __always_inline void enable_shadow_stack(void) +{ + int ret = ARCH_PRCTL(ARCH_SHSTK_ENABLE, ARCH_SHSTK_SHSTK); + if (ret == 0) + shadow_stack_enabled = true; +} + +#endif + +#ifdef __aarch64__ +#define PR_SET_SHADOW_STACK_STATUS 75 +# define PR_SHADOW_STACK_ENABLE (1UL << 0) + +#define my_syscall2(num, arg1, arg2) \ +({ \ + register long _num __asm__ ("x8") = (num); \ + register long _arg1 __asm__ ("x0") = (long)(arg1); \ + register long _arg2 __asm__ ("x1") = (long)(arg2); \ + register long _arg3 __asm__ ("x2") = 0; \ + register long _arg4 __asm__ ("x3") = 0; \ + register long _arg5 __asm__ ("x4") = 0; \ + \ + __asm__ volatile ( \ + "svc #0\n" \ + : "=r"(_arg1) \ + : "r"(_arg1), "r"(_arg2), \ + "r"(_arg3), "r"(_arg4), \ + "r"(_arg5), "r"(_num) \ + : "memory", "cc" \ + ); \ + _arg1; \ +}) + +#define ENABLE_SHADOW_STACK +static __always_inline void enable_shadow_stack(void) +{ + int ret; + + ret = my_syscall2(__NR_prctl, PR_SET_SHADOW_STACK_STATUS, + PR_SHADOW_STACK_ENABLE); + if (ret == 0) + shadow_stack_enabled = true; +} + +#endif + +#ifndef __NR_map_shadow_stack +#define __NR_map_shadow_stack 453 +#endif + +#ifndef ENABLE_SHADOW_STACK +static inline void enable_shadow_stack(void) { } +#endif + +#endif -- 2.39.5