From: James Hogan <james.hogan@imgtec.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
kvm@vger.kernel.org, linux-mips@linux-mips.org
Cc: Ralf Baechle <ralf@linux-mips.org>,
Gleb Natapov <gleb@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-api@vger.kernel.org, linux-doc@vger.kernel.org
Subject: Re: [PATCH 20/20] MIPS: KVM: Wire up MSA capability
Date: Thu, 26 Mar 2015 14:52:59 +0000 [thread overview]
Message-ID: <55141D4B.5000605@imgtec.com> (raw)
In-Reply-To: <5514108F.9060905@redhat.com>
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On 26/03/15 13:58, Paolo Bonzini wrote:
>
>
> On 11/03/2015 15:44, James Hogan wrote:
>> Now that the code is in place for KVM to support MIPS SIMD Architecutre
>> (MSA) in MIPS guests, wire up the new KVM_CAP_MIPS_MSA capability.
>>
>> For backwards compatibility, the capability must be explicitly enabled
>> in order to detect or make use of MSA from the guest.
>>
>> The capability is not supported if the hardware supports MSA vector
>> partitioning, since the extra support cannot be tested yet and it
>> extends the state that the userland program would have to save.
>>
>> Signed-off-by: James Hogan <james.hogan@imgtec.com>
>> Cc: Paolo Bonzini <pbonzini@redhat.com>
>> Cc: Ralf Baechle <ralf@linux-mips.org>
>> Cc: Gleb Natapov <gleb@kernel.org>
>> Cc: Jonathan Corbet <corbet@lwn.net>
>> Cc: linux-mips@linux-mips.org
>> Cc: kvm@vger.kernel.org
>> Cc: linux-api@vger.kernel.org
>> Cc: linux-doc@vger.kernel.org
>> Signed-off-by: James Hogan <james.hogan@imgtec.com>
>> ---
>> Documentation/virtual/kvm/api.txt | 12 ++++++++++++
>> arch/mips/kvm/mips.c | 24 ++++++++++++++++++++++++
>> include/uapi/linux/kvm.h | 1 +
>> 3 files changed, 37 insertions(+)
>>
>> diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
>> index 47ddf0475211..97dd9ee69ca8 100644
>> --- a/Documentation/virtual/kvm/api.txt
>> +++ b/Documentation/virtual/kvm/api.txt
>> @@ -3224,6 +3224,18 @@ done the KVM_REG_MIPS_FPR_* and KVM_REG_MIPS_FCR_* registers can be accessed
>> Config5.FRE bits are accessible via the KVM API and also from the guest,
>> depending on them being supported by the FPU.
>>
>> +6.10 KVM_CAP_MIPS_MSA
>> +
>> +Architectures: mips
>> +Target: vcpu
>> +Parameters: args[0] is reserved for future use (should be 0).
>> +
>> +This capability allows the use of the MIPS SIMD Architecture (MSA) by the guest.
>> +It allows the Config3.MSAP bit to be set to enable the use of MSA by the guest.
>> +Once this is done the KVM_REG_MIPS_VEC_* and KVM_REG_MIPS_MSA_* registers can be
>> +accessed, and the Config5.MSAEn bit is accessible via the KVM API and also from
>> +the guest.
>> +
>> 7. Capabilities that can be enabled on VMs
>> ------------------------------------------
>>
>> diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c
>> index 9319c4360285..3b3530f493eb 100644
>> --- a/arch/mips/kvm/mips.c
>> +++ b/arch/mips/kvm/mips.c
>> @@ -880,6 +880,15 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
>> return -EINVAL;
>> vcpu->arch.fpu_enabled = true;
>> break;
>> + case KVM_CAP_MIPS_MSA:
>> + /*
>> + * MSA vector partitioning not supported,
>> + * see kvm_vm_ioctl_check_extension().
>> + */
>> + if (!cpu_has_msa || boot_cpu_data.msa_id & MSA_IR_WRPF)
>> + return -EINVAL;
>
> Perhaps you can call kvm_vm_ioctl_check_extension directly, outside the
> switch (it's okay if it's called for a capability other than FPU and MSA)?
Yes, good idea. That works nicely.
>
> Apart from this nit,
>
> Acked-by: Paolo Bonzini <pbonzini@redhat.com>
>
> Paolo
Thanks!
James
>
>> + vcpu->arch.msa_enabled = true;
>> + break;
>> default:
>> r = -EINVAL;
>> break;
>> @@ -1071,6 +1080,21 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
>> case KVM_CAP_MIPS_FPU:
>> r = !!cpu_has_fpu;
>> break;
>> + case KVM_CAP_MIPS_MSA:
>> + /*
>> + * We don't support MSA vector partitioning yet:
>> + * 1) It would require explicit support which can't be tested
>> + * yet due to lack of support in current hardware.
>> + * 2) It extends the state that would need to be saved/restored
>> + * by e.g. QEMU for migration.
>> + *
>> + * When vector partitioning hardware becomes available, support
>> + * could be added by requiring a flag when enabling
>> + * KVM_CAP_MIPS_MSA capability to indicate that userland knows
>> + * to save/restore the appropriate extra state.
>> + */
>> + r = cpu_has_msa && !(boot_cpu_data.msa_id & MSA_IR_WRPF);
>> + break;
>> default:
>> r = 0;
>> break;
>> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
>> index 98f6e5c653ff..5f859888e3ad 100644
>> --- a/include/uapi/linux/kvm.h
>> +++ b/include/uapi/linux/kvm.h
>> @@ -761,6 +761,7 @@ struct kvm_ppc_smmu_info {
>> #define KVM_CAP_CHECK_EXTENSION_VM 105
>> #define KVM_CAP_S390_USER_SIGP 106
>> #define KVM_CAP_MIPS_FPU 107
>> +#define KVM_CAP_MIPS_MSA 108
>>
>> #ifdef KVM_CAP_IRQ_ROUTING
>>
>>
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prev parent reply other threads:[~2015-03-26 14:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-11 14:44 [PATCH 00/20] MIPS: KVM: Guest FPU & SIMD (MSA) support James Hogan
2015-03-11 14:44 ` [PATCH 14/20] MIPS: KVM: Expose FPU registers James Hogan
2015-03-26 13:55 ` Paolo Bonzini
[not found] ` <1426085096-12932-1-git-send-email-james.hogan-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>
2015-03-11 14:44 ` [PATCH 15/20] MIPS: KVM: Wire up FPU capability James Hogan
2015-03-11 14:44 ` [PATCH 19/20] MIPS: KVM: Expose MSA registers James Hogan
2015-03-11 14:44 ` [PATCH 20/20] MIPS: KVM: Wire up MSA capability James Hogan
2015-03-26 13:58 ` Paolo Bonzini
2015-03-26 14:52 ` James Hogan [this message]
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