From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yu-cheng Yu Subject: Re: [PATCH v7 03/14] x86/cet/ibt: Add IBT legacy code bitmap setup function Date: Fri, 07 Jun 2019 12:23:46 -0700 Message-ID: <997ef050c13e3654dee6a862d810cffcafce249b.camel@intel.com> References: <20190606200926.4029-1-yu-cheng.yu@intel.com> <20190606200926.4029-4-yu-cheng.yu@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz List-Id: linux-api@vger.kernel.org On Fri, 2019-06-07 at 12:03 -0700, Dave Hansen wrote: > On 6/6/19 1:09 PM, Yu-cheng Yu wrote: > > + modify_fpu_regs_begin(); > > + rdmsrl(MSR_IA32_U_CET, r); > > + r |= (MSR_IA32_CET_LEG_IW_EN | bitmap); > > + wrmsrl(MSR_IA32_U_CET, r); > > + modify_fpu_regs_end(); > > Isn't there a bunch of other stuff in this MSR? It seems like the > bitmap value would allow overwriting lots of bits in the MSR that have > nothing to do with the bitmap... in a prctl() that's supposed to only be > dealing with the bitmap. Yes, the bitmap address should have been masked, although it is checked for page alignment (which has the same effect). I will fix it. Yu-cheng