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X-CSE-ConnectionGUID: TbE26/r+QVOzHo+lqsTgkw== X-CSE-MsgGUID: Dv32UzmWT6S1Z+F0Du/zaw== X-IronPort-AV: E=McAfee;i="6700,10204,11218"; a="27610400" X-IronPort-AV: E=Sophos;i="6.11,184,1725346800"; d="scan'208";a="27610400" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2024 08:58:32 -0700 X-CSE-ConnectionGUID: AuZN3X4GTNmN2PxPWZj3/Q== X-CSE-MsgGUID: b56ATVOlRna+DXk2BuxROw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,184,1725346800"; d="scan'208";a="80129091" Received: from bjrankin-mobl3.amr.corp.intel.com (HELO [10.124.222.6]) ([10.124.222.6]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2024 08:58:31 -0700 Message-ID: <0a1678d8-0974-4783-a6f6-da85adfa1a34@intel.com> Date: Mon, 7 Oct 2024 08:58:29 -0700 Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v3 00/10] Add support for shared PTEs across processes To: David Hildenbrand , Anthony Yznaga , akpm@linux-foundation.org, willy@infradead.org, markhemm@googlemail.com, viro@zeniv.linux.org.uk, khalid@kernel.org Cc: andreyknvl@gmail.com, luto@kernel.org, brauner@kernel.org, arnd@arndb.de, ebiederm@xmission.com, catalin.marinas@arm.com, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, mhiramat@kernel.org, rostedt@goodmis.org, vasily.averin@linux.dev, xhao@linux.alibaba.com, pcc@google.com, neilb@suse.de, maz@kernel.org, David Rientjes References: <20240903232241.43995-1-anthony.yznaga@oracle.com> <9927f9a3-efba-4053-8384-cc69c7949ea6@intel.com> <8c7fbaf1-61a0-4f55-8466-1ab40464d9db@redhat.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 10/7/24 01:44, David Hildenbrand wrote: > On 02.10.24 19:35, Dave Hansen wrote: >> We were just chatting about this on David Rientjes's MM alignment call. > > Unfortunately I was not able to attend this time, my body decided it's a > good idea to stay in bed for a couple of days. > >> I thought I'd try to give a little brain >> >> Let's start by thinking about KVM and secondary MMUs.  KVM has a primary >> mm: the QEMU (or whatever) process mm.  The virtualization (EPT/NPT) >> tables get entries that effectively mirror the primary mm page tables >> and constitute a secondary MMU.  If the primary page tables change, >> mmu_notifiers ensure that the changes get reflected into the >> virtualization tables and also that the virtualization paging structure >> caches are flushed. >> >> msharefs is doing something very similar.  But, in the msharefs case, >> the secondary MMUs are actually normal CPU MMUs.  The page tables are >> normal old page tables and the caches are the normal old TLB.  That's >> what makes it so confusing: we have lots of infrastructure for dealing >> with that "stuff" (CPU page tables and TLB), but msharefs has >> short-circuited the infrastructure and it doesn't work any more. > > It's quite different IMHO, to a degree that I believe they are different > beasts: > > Secondary MMUs: > * "Belongs" to same MM context and the primary MMU (process page tables) I think you're speaking to the ratio here. For each secondary MMU, I think you're saying that there's one and only one mm_struct. Is that right? > * Maintains separate tables/PTEs, in completely separate page table >   hierarchy This is the case for KVM and the VMX/SVM MMUs, but it's not generally true about hardware. IOMMUs can walk x86 page tables and populate the IOTLB from the _same_ page table hierarchy as the CPU.