Accessing memory remote across the bus in the same way as local memory

[James Bottomley <James.Bottomley@SteelEye.com>]

The question has come up [in the DMA API issues thread on lkml] of
whether we can access on chip memory areas as though they were normal
memory (i.e. use normal reads and writes to access it).

The memory regions in question would have to be accessible via MMIO
cycles on the bus and be aligned and sized as multiples of PAGE_SIZE.

The question is given the constraints, can we pull page table tricks on
every platform to make this bus remote memory look like real memory?

I know ioremap() read[bwl]/write[bwl] etc. is what we currently tell
people to do, but I'm curious to know if there's actually a platform
that has some type of limitation that requires bus remote memory to be
treated differently.  Rather than simply being a convenience, like we
use it as on parisc today.

James