Re: Accessing memory remote across the bus in the same way as local memory

[James Bottomley <James.Bottomley@SteelEye.com>]

On Fri, 2004-06-18 at 18:32, David S. Miller wrote:
> There are three issues:

Oh, yes, I know this isn't easy, it would be an absolute pig on parisc
too because we use absloute instruction accesses currently to MMIO
space...if we start remapping pieces we end up with cache aliasing
issues.

But what I'm more concerned about is is there a basic show stopper that
would prevent a platform from doing this?

> 1) How to form the physical address (for a PCI device we have PCI device
>    pointer and resource, stuff like that, we just need a translator
>    interface or similar to pass that info in)

That's really something the DMA API does well today.  I think as part of
the implementation, we'd just have the device register the area and its
own internal address for it.

> 2) Whether such accesses are legal.  On Sparc64 one device cannot DMA
>    to/from the MMIO of a device behind a _DIFFERENT_ PCI controller.

Yes, this one could be tricky: no using the memory you obtained for DMA
to or from anything other than this one device.

> 3) Some logic to get page table non-cacheable bits set etc. since this
>    is to non-memory space.

This would be up to the platform piece of the API to sort out, I think.

I'm not anywhere close to proposing this, I'm just exploring the
possibility at the moment.  I'm still arguing "no" in the DMA API
thread...

James