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	Thu, 23 Sep 2004 15:04:12 -0400
Subject: Re: [PATCH] I/O space write barrier
From: James Bottomley <James.Bottomley@steeleye.com>
In-Reply-To: <200409231448.21887.jbarnes@engr.sgi.com>
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Date: 23 Sep 2004 15:03:51 -0400
Message-Id: <1095966238.3043.26.camel@mulgrave>
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To: Jesse Barnes <jbarnes@engr.sgi.com>
Cc: linux-arch@vger.kernel.org
List-ID: <linux-arch.vger.kernel.org>

On Thu, 2004-09-23 at 14:48, Jesse Barnes wrote:
> -	RD_REG_WORD(&reg->ictrl);	/* PCI Posted Write flush */
> +	mmiowb(); /* make sure this write arrives before any others */

What's going on here?  In your docs you say this mmiowb() is explicitly
to prevent write ordering problems and doesn't affect posting.  However
in this patch you're using it to replace a posting flush read.

>  	ha->flags.ints_enabled = 1;

The result will be that we can get to here, but the write that enables
the interrupt may still be posted in a bridge somewhere.

James