From: Geert Uytterhoeven <geert@linux-m68k.org>
To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [CFT] MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
Date: Wed, 20 Jan 2010 17:45:34 +0100 [thread overview]
Message-ID: <10f740e81001200845o7a31bcb6yea475f3aabcb5476@mail.gmail.com> (raw)
In-Reply-To: <20100120135202.GA20937@flint.arm.linux.org.uk>
On Wed, Jan 20, 2010 at 14:52, Russell King <rmk+lkml@arm.linux.org.uk> wrote:
> On VIVT ARM, when we have multiple shared mappings of the same file
> in the same MM, we need to ensure that we have coherency across all
> copies. We do this via make_coherent() by making the pages
> uncacheable.
>
> This used to work fine, until we allowed highmem with highpte - we
> now have a page table which is mapped as required, and is not available
> for modification via update_mmu_cache().
>
> Ralf Beache suggested getting rid of the PTE value passed to
> update_mmu_cache():
>
> On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables
> to construct a pointer to the pte again. Passing a pte_t * is much
> more elegant. Maybe we might even replace the pte argument with the
> pte_t?
>
> Ben Herrenschmidt would also like the pte pointer for PowerPC:
>
> Passing the ptep in there is exactly what I want. I want that
> -instead- of the PTE value, because I have issue on some ppc cases,
> for I$/D$ coherency, where set_pte_at() may decide to mask out the
> _PAGE_EXEC.
>
> So, pass in the mapped page table pointer into update_mmu_cache(), and
> remove the PTE value, updating all implementations and call sites to
> suit.
> diff --git a/Documentation/cachetlb.txt b/Documentation/cachetlb.txt
> index da42ab4..74a8b6f 100644
> --- a/Documentation/cachetlb.txt
> +++ b/Documentation/cachetlb.txt
> @@ -88,12 +88,12 @@ changes occur:
> This is used primarily during fault processing.
>
> 5) void update_mmu_cache(struct vm_area_struct *vma,
> - unsigned long address, pte_t pte)
> + unsigned long address, pte_t *ptep)
>
> At the end of every page fault, this routine is invoked to
> tell the architecture specific code that a translation
> - described by "pte" now exists at virtual address "address"
> - for address space "vma->vm_mm", in the software page tables.
> + now exists at virtual address "address" for address space
> + "vma->vm_mm", in the software page tables.
>
> A port may use this information in any way it so chooses.
> For example, it could use this event to pre-load TLB
Now the documentation no longer mentions what the 3rd parameter is used for?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2010-01-20 16:45 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-20 13:52 [CFT] MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself Russell King
2010-01-20 16:45 ` Geert Uytterhoeven [this message]
2010-01-20 16:45 ` Geert Uytterhoeven
2010-01-20 16:54 ` Russell King
2010-01-22 3:50 ` Benjamin Herrenschmidt
2010-02-09 2:43 ` Benjamin Herrenschmidt
2010-02-09 2:43 ` Benjamin Herrenschmidt
2010-02-18 16:25 ` Russell King
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