From mboxrd@z Thu Jan 1 00:00:00 1970 From: James Bottomley Subject: [PATCH 2/6] parisc: add mm API for DMA to vmalloc/vmap areas Date: Wed, 9 Sep 2009 10:52:12 -0500 Message-ID: <1252511536-22066-3-git-send-email-James.Bottomley@suse.de> References: <1252511536-22066-1-git-send-email-James.Bottomley@suse.de> <1252511536-22066-2-git-send-email-James.Bottomley@suse.de> Return-path: In-Reply-To: <1252511536-22066-2-git-send-email-James.Bottomley@suse.de> Sender: linux-fsdevel-owner@vger.kernel.org To: linux-arch@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-parisc@vger.kernel.org Cc: Russell King , Christoph Hellwig , Paul Mundt , James Bottomley List-Id: linux-arch.vger.kernel.org We already have an API to flush a kernel page along an alias address, so use it. The TLB purge prevents the CPU from doing speculative moveins on the flushed address, so we don't need to implement and invalidate. Signed-off-by: James Bottomley --- arch/parisc/include/asm/cacheflush.h | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index 7243951..2536a00 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -90,6 +90,14 @@ static inline void flush_kernel_dcache_page(struct page *page) { flush_kernel_dcache_page_addr(page_address(page)); } +static inline void flush_kernel_dcache_addr(void *addr) +{ + flush_kernel_dcache_page_addr(addr); +} +static inline void invalidate_kernel_dcache_addr(void *addr) +{ + /* nop .. the flush prevents move in until the page is touched */ +} #ifdef CONFIG_DEBUG_RODATA void mark_rodata_ro(void); -- 1.6.3.3 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cantor.suse.de ([195.135.220.2]:57683 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752489AbZIIPwb (ORCPT ); Wed, 9 Sep 2009 11:52:31 -0400 From: James Bottomley Subject: [PATCH 2/6] parisc: add mm API for DMA to vmalloc/vmap areas Date: Wed, 9 Sep 2009 10:52:12 -0500 Message-ID: <1252511536-22066-3-git-send-email-James.Bottomley@suse.de> In-Reply-To: <1252511536-22066-2-git-send-email-James.Bottomley@suse.de> References: <1252511536-22066-1-git-send-email-James.Bottomley@suse.de> <1252511536-22066-2-git-send-email-James.Bottomley@suse.de> Sender: linux-arch-owner@vger.kernel.org List-ID: To: linux-arch@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-parisc@vger.kernel.org Cc: Russell King , Christoph Hellwig , Paul Mundt , James Bottomley Message-ID: <20090909155212.d_k1oG18tFfk-SUR2kPsjrvOvj8omd7mgvlc8E69IW0@z> We already have an API to flush a kernel page along an alias address, so use it. The TLB purge prevents the CPU from doing speculative moveins on the flushed address, so we don't need to implement and invalidate. Signed-off-by: James Bottomley --- arch/parisc/include/asm/cacheflush.h | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index 7243951..2536a00 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -90,6 +90,14 @@ static inline void flush_kernel_dcache_page(struct page *page) { flush_kernel_dcache_page_addr(page_address(page)); } +static inline void flush_kernel_dcache_addr(void *addr) +{ + flush_kernel_dcache_page_addr(addr); +} +static inline void invalidate_kernel_dcache_addr(void *addr) +{ + /* nop .. the flush prevents move in until the page is touched */ +} #ifdef CONFIG_DEBUG_RODATA void mark_rodata_ro(void); -- 1.6.3.3