From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Zijlstra Subject: Re: [PATCH 07/13] powerpc: Preemptible mmu_gather Date: Wed, 14 Apr 2010 15:51:48 +0200 Message-ID: <1271253108.32749.46.camel@laptop> References: <20100408191737.296180458@chello.nl> <20100408192722.901224587@chello.nl> <1271121817.13059.19.camel@pasglop> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1271121817.13059.19.camel@pasglop> Sender: linux-kernel-owner@vger.kernel.org To: Benjamin Herrenschmidt Cc: Andrea Arcangeli , Avi Kivity , Thomas Gleixner , Rik van Riel , Ingo Molnar , akpm@linux-foundation.org, Linus Torvalds , linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, David Miller , Hugh Dickins , Mel Gorman , Nick Piggin , "Paul E. McKenney" List-Id: linux-arch.vger.kernel.org On Tue, 2010-04-13 at 11:23 +1000, Benjamin Herrenschmidt wrote: > > + * If there are, but we fail to batch, we need to IPI (all?) CPUs so as > > + * to serialize against the IRQ disable. In case we do batch, the RCU > > + * grace period is at least long enough to cover IRQ disabled sections > > + * (XXX assumption, not strictly true). > > Yeah well ... I'm not that familiar with RCU anymore. Back when I wrote > that, iirc, I would more or less be safe against a CPU that doesn't > schedule, but things may have well changed. > > We are trying to be safe against another CPU walking page tables in the > asm lockless hash miss or TLB miss code. Note that sparc64 has a similar > issue. This is highly optimized asm code that -cannot- call into things > like rcu_read_lock(). Right, so Paul has been working hard to remove certain implementation artifact from RCU, such as the preempt-disable == rcu_read_lock thing. Now, even Preemptible RCU has IRQ-disabled == rcu_read_lock, simply because the RCU grace period state machine is driven from an interrupt. But there is no such requirement on RCU at all, so in the interest of removing assumptions and code validating we're trying to remove such things. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from casper.infradead.org ([85.118.1.10]:49125 "EHLO casper.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757402Ab0DOH3k (ORCPT ); Thu, 15 Apr 2010 03:29:40 -0400 Received: from e35131.upc-e.chello.nl ([213.93.35.131] helo=dyad.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.69 #1 (Red Hat Linux)) id 1O2JW7-0005by-FC for linux-arch@vger.kernel.org; Thu, 15 Apr 2010 07:29:39 +0000 Subject: Re: [PATCH 07/13] powerpc: Preemptible mmu_gather From: Peter Zijlstra In-Reply-To: <1271121817.13059.19.camel@pasglop> References: <20100408191737.296180458@chello.nl> <20100408192722.901224587@chello.nl> <1271121817.13059.19.camel@pasglop> Content-Type: text/plain; charset="UTF-8" Date: Wed, 14 Apr 2010 15:51:48 +0200 Message-ID: <1271253108.32749.46.camel@laptop> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-arch-owner@vger.kernel.org List-ID: To: Benjamin Herrenschmidt Cc: Andrea Arcangeli , Avi Kivity , Thomas Gleixner , Rik van Riel , Ingo Molnar , akpm@linux-foundation.org, Linus Torvalds , linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, David Miller , Hugh Dickins , Mel Gorman , Nick Piggin , "Paul E. McKenney" Message-ID: <20100414135148.6NsY84X_rFF_YKM8Z_umG7HF8G4bGnhEwv--YiYvF7k@z> On Tue, 2010-04-13 at 11:23 +1000, Benjamin Herrenschmidt wrote: > > + * If there are, but we fail to batch, we need to IPI (all?) CPUs so as > > + * to serialize against the IRQ disable. In case we do batch, the RCU > > + * grace period is at least long enough to cover IRQ disabled sections > > + * (XXX assumption, not strictly true). > > Yeah well ... I'm not that familiar with RCU anymore. Back when I wrote > that, iirc, I would more or less be safe against a CPU that doesn't > schedule, but things may have well changed. > > We are trying to be safe against another CPU walking page tables in the > asm lockless hash miss or TLB miss code. Note that sparc64 has a similar > issue. This is highly optimized asm code that -cannot- call into things > like rcu_read_lock(). Right, so Paul has been working hard to remove certain implementation artifact from RCU, such as the preempt-disable == rcu_read_lock thing. Now, even Preemptible RCU has IRQ-disabled == rcu_read_lock, simply because the RCU grace period state machine is driven from an interrupt. But there is no such requirement on RCU at all, so in the interest of removing assumptions and code validating we're trying to remove such things.