Re: [PATCH 07/24] C6X: memory management

[Mark Salter <msalter@redhat.com>]

On Tue, 2011-08-09 at 18:27 +0200, Arnd Bergmann wrote:
> > +static inline int dma_is_consistent(struct device *dev, dma_addr_t
> handle)
> > +{
> > +     if (arch_is_coherent() || __dma_is_coherent(dev, handle))
> > +             return 1;
> > +     else
> > +             return 0;
> > +}
> 
> Does this need to be both a runtime decision and set per device?
> Most architectures are just always consistent or never, so you could
> turn this into an #ifdef block to define the two versions, or even
> just provide one version.

C6X is never consistent in that there is no hw snooping between main
memory and L2 cache. There is some cache control however which allows
us to create a pool of uncached memory for use as consistent DMA memory.
I think the __dma_is_coherent tries to tell at runtime if the dma handle
comes from such a pool of consistent memory.

I'm not aware of any drivers actually needing this although I'm sure TI
has some. For the purpose of getting the arch accepted, I could just
punt and take it out for now, simplifying the dma support. It can be
revisited later if needed.

--Mark