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From: Yinghai Lu <yinghai@kernel.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Tony Luck <tony.luck@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Dominik Brodowski <linux@dominikbrodowski.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>,
	Fenghua Yu <fenghua.yu@intel.com>,
	linux-ia64@vger.kernel.org
Subject: [PATCH 06/15] PCI, ia64: Register busn_res for root buses
Date: Wed,  1 Feb 2012 14:43:53 -0800	[thread overview]
Message-ID: <1328136242-17725-7-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1328136242-17725-1-git-send-email-yinghai@kernel.org>

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: linux-ia64@vger.kernel.org
---
 arch/ia64/pci/pci.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index f82f5d4..936b2f1 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -331,6 +331,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
 	struct acpi_device *device = root->device;
 	int domain = root->segment;
 	int bus = root->secondary.start;
+	int busmax = root->secondary.end;
 	struct pci_controller *controller;
 	unsigned int windows = 0;
 	struct pci_root_info info;
@@ -384,6 +385,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
 		return NULL;
 	}
 
+	pci_bus_insert_busn_res(pbus, busnum, busmax);
 	pbus->subordinate = pci_scan_child_bus(pbus);
 	return pbus;
 
-- 
1.7.7

  parent reply	other threads:[~2012-02-01 22:43 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-02-01 22:43 [PATCH -v4 0/15] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-02-01 22:43 ` Yinghai Lu
2012-02-01 22:43 ` [PATCH 01/15] Make %pR could handle bus resource with domain Yinghai Lu
2012-02-01 22:43   ` Yinghai Lu
2012-02-03 16:26   ` Bjorn Helgaas
2012-02-03 16:26     ` Bjorn Helgaas
2012-02-03 17:23     ` Yinghai Lu
2012-02-03 17:23       ` Yinghai Lu
2012-02-01 22:43 ` [PATCH 02/15] PCI: Add iobusn_resource Yinghai Lu
2012-02-03 16:36   ` Bjorn Helgaas
2012-02-03 17:19     ` Yinghai Lu
2012-02-03 23:38     ` Benjamin Herrenschmidt
2012-02-04  2:30       ` Yinghai Lu
2012-02-06 17:14         ` Bjorn Helgaas
2012-02-06 18:48           ` Yinghai Lu
2012-02-06 18:48             ` Yinghai Lu
2012-02-01 22:43 ` [PATCH 03/15] PCI: Add busn_res operation functions Yinghai Lu
2012-02-01 22:43   ` Yinghai Lu
2012-02-01 22:43 ` [PATCH 04/15] PCI: Add busn_res tracking in core Yinghai Lu
2012-02-01 22:43 ` [PATCH 05/15] PCI, x86: Register busn_res for root buses Yinghai Lu
2012-02-01 22:43   ` Yinghai Lu
2012-02-01 22:43 ` Yinghai Lu [this message]
2012-02-01 22:43   ` [PATCH 06/15] PCI, ia64: " Yinghai Lu
2012-02-01 22:43 ` [PATCH 07/15] PCI, powerpc: " Yinghai Lu
2012-02-01 22:43   ` Yinghai Lu
2012-02-01 22:43 ` [PATCH 08/15] PCI, parisc: " Yinghai Lu
2012-02-01 22:43   ` Yinghai Lu
2012-02-01 22:43 ` [PATCH 09/15] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-02-01 22:43   ` Yinghai Lu
2012-02-01 22:43 ` [PATCH 10/15] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-02-01 22:43 ` [PATCH 11/15] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-02-01 22:43   ` Yinghai Lu
2012-02-01 22:43 ` [PATCH 12/15] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-02-01 22:43   ` Yinghai Lu
2012-02-01 22:44 ` [PATCH 13/15] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-02-01 22:44 ` [PATCH 14/15] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-02-01 22:44   ` Yinghai Lu
2012-02-01 22:44 ` [PATCH 15/15] pcmcia: remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-02-01 22:44   ` Yinghai Lu

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