From: Yinghai Lu <yinghai@kernel.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Tony Luck <tony.luck@intel.com>,
David Miller <davem@davemloft.net>, x86 <x86@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Dominik Brodowski <linux@dominikbrodowski.net>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH 33/39] PCI: Allocate bus range instead of use max blindly
Date: Wed, 29 Feb 2012 15:07:32 -0800 [thread overview]
Message-ID: <1330556858-11768-34-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1330556858-11768-1-git-send-email-yinghai@kernel.org>
every bus have extra busn_res, and linked them toghter to iobusn_resource.
when need to find usable bus number range, try probe from iobusn_resource tree.
To avoid falling to small hole in the middle, we try from 8 spare bus.
if can not find 8 or more in the middle, will try to append 8 on top later.
then if can not append, will try to find 7 from the middle, then will try to append 7 on top.
then if can not append, will try to find 6 from the middle...
for cardbus will only find 4 spare.
if extend from top, at last will shrink back to really needed range...
-v4: fix checking with pci rescan. Found by Bjorn.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
drivers/pci/probe.c | 100 ++++++++++++++++++++++++++++++---------------------
1 files changed, 59 insertions(+), 41 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 5c031f0..f22a209 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -839,10 +839,11 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
{
struct pci_bus *child;
int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
- u32 buses, i, j = 0;
+ u32 buses;
u16 bctl;
u8 primary, secondary, subordinate;
int broken = 0;
+ struct resource *parent_res = NULL;
pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
primary = buses & 0xFF;
@@ -859,10 +860,16 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
/* Check if setup is sensible at all */
if (!pass &&
- (primary != bus->number || secondary <= bus->number)) {
- dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
+ (primary != bus->number || secondary <= bus->number))
broken = 1;
- }
+
+ /* more strict checking */
+ if (!pass && !broken && !dev->subordinate)
+ broken = pci_bridge_check_busn_broken(bus, dev,
+ secondary, subordinate);
+
+ if (broken)
+ dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
/* Disable MasterAbortMode during probing to avoid reporting
of bus errors (in some architectures) */
@@ -895,6 +902,8 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
child->primary = primary;
child->subordinate = subordinate;
child->bridge_ctl = bctl;
+
+ pci_bus_insert_busn_res(child, secondary, subordinate);
}
cmax = pci_scan_child_bus(child);
@@ -907,6 +916,11 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
* We need to assign a number to this bus which we always
* do in the second pass.
*/
+ long shrink_size;
+ struct resource busn_res;
+ int ret = -ENOMEM;
+ int old_max = max;
+
if (!pass) {
if (pcibios_assign_all_busses() || broken)
/* Temporarily disable forwarding of the
@@ -923,20 +937,43 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
/* Clear errors */
pci_write_config_word(dev, PCI_STATUS, 0xffff);
- /* Prevent assigning a bus number that already exists.
- * This can happen when a bridge is hot-plugged, so in
- * this case we only re-scan this bus. */
- child = pci_find_bus(pci_domain_nr(bus), max+1);
- if (!child) {
- child = pci_add_new_bus(bus, dev, ++max);
- if (!child)
- goto out;
+ if (dev->subordinate) {
+ /* We get here only for cardbus */
+ child = dev->subordinate;
+ if (!is_cardbus)
+ dev_warn(&dev->dev,
+ "rescan scaned bridge as broken one again ?");
+
+ goto out;
}
+ /*
+ * For CardBus bridges, we leave 4 bus numbers
+ * as cards with a PCI-to-PCI bridge can be
+ * inserted later.
+ * other just allocate 8 bus to avoid we fall into
+ * small hole in the middle.
+ */
+ ret = pci_bridge_probe_busn_res(bus, dev, &busn_res,
+ is_cardbus ? (CARDBUS_RESERVE_BUSNR + 1) : 8,
+ &parent_res);
+
+ if (ret != 0)
+ goto out;
+
+ child = pci_add_new_bus(bus, dev, busn_res.start);
+ if (!child)
+ goto out;
+
+ child->subordinate = busn_res.end;
+ pci_bus_insert_busn_res(child, busn_res.start, busn_res.end);
+
buses = (buses & 0xff000000)
| ((unsigned int)(child->primary) << 0)
| ((unsigned int)(child->secondary) << 8)
| ((unsigned int)(child->subordinate) << 16);
+ max = child->subordinate;
+
/*
* yenta.c forces a secondary latency timer of 176.
* Copy that behaviour here.
@@ -967,43 +1004,24 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
* the real value of max.
*/
pci_fixup_parent_subordinate_busnr(child, max);
+
} else {
- /*
- * For CardBus bridges, we leave 4 bus numbers
- * as cards with a PCI-to-PCI bridge can be
- * inserted later.
- */
- for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) {
- struct pci_bus *parent = bus;
- if (pci_find_bus(pci_domain_nr(bus),
- max+i+1))
- break;
- while (parent->parent) {
- if ((!pcibios_assign_all_busses()) &&
- (parent->subordinate > max) &&
- (parent->subordinate <= max+i)) {
- j = 1;
- }
- parent = parent->parent;
- }
- if (j) {
- /*
- * Often, there are two cardbus bridges
- * -- try to leave one valid bus number
- * for each one.
- */
- i /= 2;
- break;
- }
- }
- max += i;
pci_fixup_parent_subordinate_busnr(child, max);
}
/*
* Set the subordinate bus number to its real value.
*/
+ shrink_size = child->subordinate - max;
child->subordinate = max;
pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
+ pci_bus_update_busn_res_end(child, max);
+
+ /* shrink some back, if we extend top before */
+ if (!is_cardbus && (shrink_size > 0) && parent_res)
+ pci_bus_shrink_top(bus, shrink_size, parent_res);
+
+ if (old_max > max)
+ max = old_max;
}
sprintf(child->name,
--
1.7.7
next prev parent reply other threads:[~2012-02-29 23:07 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-02-29 23:06 [PATCH 00/39] PCI: pci_host_bridge related cleanup and busn_alloc Yinghai Lu
2012-02-29 23:07 ` [PATCH 01/39] PCI: Separate host_bridge code out from probe.c Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 02/39] x86, PCI: have own version for pcibios_bus_to_resource Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:20 ` Bjorn Helgaas
2012-02-29 23:33 ` Yinghai Lu
2012-03-01 0:42 ` Bjorn Helgaas
2012-03-01 0:42 ` Bjorn Helgaas
2012-03-01 2:54 ` Yinghai Lu
2012-03-01 2:54 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 03/39] x86, PCI: Fix memleak with get_current_resources Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 04/39] PCI: rename pci_host_bridge() to find_pci_root_bridge() Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 05/39] PCI: add generic device into pci_host_bridge struct Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 06/39] PCI: add host bridge release support Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 07/39] x86, PCI: break down get_current_resource() Yinghai Lu
2012-02-29 23:07 ` [PATCH 08/39] x86, PCI: add host bridge resource release for using _CRS Yinghai Lu
2012-02-29 23:07 ` [PATCH 09/39] x86, PCI: embed name acpi version pci_root_info struct Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 10/39] x86, PCI: embed pci_sysdata into pci_root_info on acpi path Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 11/39] x86, PCI: Allocating pci_root_info for not using _CRS path Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 12/39] x86, PCI: Merge root info printing for nocrs path Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 13/39] x86, PCI: add print all root info " Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 14/39] x86, PCI: allocate temp range array in amd_bus pci_root_info probing Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 15/39] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 16/39] PCI: skip busn resource at first Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 17/39] x86, PCI: put busn resource in pci_root_info for acpi path Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 18/39] PCI: default busn_resource Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 19/39] x86, PCI: put busn resource in pci_root_info for no_crs path Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 20/39] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-02-29 23:07 ` [PATCH 21/39] PCI: Add busn_res operation functions Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 22/39] PCI: release busn when removing bus Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 23/39] PCI: insert busn_res in pci_create_root_bus Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 24/39] PCI: checking busn_res in pci_scan_root_bus Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 25/39] PCI: add default res for pci_scan_bus Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 26/39] PCI, ia64: Register busn_res for root buses Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 27/39] PCI, sparc: " Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 28/39] PCI, powerpc: " Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 29/39] PCI, parisc: " Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 30/39] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 31/39] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 32/39] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu [this message]
2012-02-29 23:07 ` [PATCH 33/39] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-02-29 23:07 ` [PATCH 34/39] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 35/39] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 36/39] pcmcia: remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 37/39] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 38/39] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:07 ` [PATCH 39/39] x86, PCI: kill busn in acpi pci_root_info Yinghai Lu
2012-02-29 23:07 ` Yinghai Lu
2012-02-29 23:32 ` Bjorn Helgaas
2012-02-29 23:32 ` Bjorn Helgaas
2012-02-29 23:37 ` Yinghai Lu
2012-02-29 23:37 ` Yinghai Lu
2012-02-29 23:51 ` Greg KH
2012-03-01 0:27 ` Jesse Barnes
2012-03-01 2:57 ` Yinghai Lu
2012-03-01 2:57 ` Yinghai Lu
2012-03-01 18:51 ` [PATCH 00/39] PCI: pci_host_bridge related cleanup and busn_alloc Myron Stowe
2012-03-01 18:51 ` Myron Stowe
2012-03-01 19:03 ` Yinghai Lu
2012-03-01 19:03 ` Yinghai Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1330556858-11768-34-git-send-email-yinghai@kernel.org \
--to=yinghai@kernel.org \
--cc=benh@kernel.crashing.org \
--cc=bhelgaas@google.com \
--cc=davem@davemloft.net \
--cc=jbarnes@virtuousgeek.org \
--cc=linux-arch@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux@dominikbrodowski.net \
--cc=tony.luck@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).